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authorPeter Lemenkov <lemenkov@gmail.com>2019-06-15 21:39:32 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-07-18 13:48:43 +0000
commit6752b61514609efd55e7d248b7c3c7127ee43693 (patch)
tree7ceaae627f48f4fdc679ff64694d5165f97fc810 /src/mainboard/samsung
parent915327136858d5412c9c02bf0730578e87101d59 (diff)
downloadcoreboot-6752b61514609efd55e7d248b7c3c7127ee43693.tar.xz
mb/*/*/gpio: Use static for const structures
Autoport generates these structures as static so let's make it consistent. See also commit 128205fd with Change-Id I83382d38a4a3b7ed11b8e7077cc5fbe154e261a7 ("autoport/bd82x6x.go: Improve gpio.c generation"). Change-Id: I4e07bd755ca4a65b76c69625d235a879fe7b43cb Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33524 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/samsung')
-rw-r--r--src/mainboard/samsung/lumpy/gpio.c22
-rw-r--r--src/mainboard/samsung/stumpy/gpio.c18
2 files changed, 20 insertions, 20 deletions
diff --git a/src/mainboard/samsung/lumpy/gpio.c b/src/mainboard/samsung/lumpy/gpio.c
index 9d07e643cf..103763d6e2 100644
--- a/src/mainboard/samsung/lumpy/gpio.c
+++ b/src/mainboard/samsung/lumpy/gpio.c
@@ -22,7 +22,7 @@
* GPIO SET 1 includes GPIO0 to GPIO31
*/
-const struct pch_gpio_set1 pch_gpio_set1_mode = {
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio0 = GPIO_MODE_GPIO, /* CHP3_SERDBG */
.gpio1 = GPIO_MODE_GPIO, /* KBC3_EXTSMI# */
.gpio2 = GPIO_MODE_NATIVE, /* CHP3_ALSINT# (Light Sensor) */
@@ -57,7 +57,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio31 = GPIO_MODE_NATIVE, /* KBC3_AC_PRESENT */
};
-const struct pch_gpio_set1 pch_gpio_set1_direction = {
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio0 = GPIO_DIR_OUTPUT,
.gpio1 = GPIO_DIR_INPUT,
.gpio2 = GPIO_DIR_INPUT,
@@ -92,7 +92,7 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio31 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set1 pch_gpio_set1_level = {
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio0 = GPIO_LEVEL_LOW,
.gpio1 = GPIO_LEVEL_LOW,
.gpio2 = GPIO_LEVEL_LOW,
@@ -127,7 +127,7 @@ const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio31 = GPIO_LEVEL_LOW,
};
-const struct pch_gpio_set1 pch_gpio_set1_invert = {
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
.gpio0 = GPIO_NO_INVERT,
.gpio1 = GPIO_INVERT,
.gpio2 = GPIO_INVERT,
@@ -150,7 +150,7 @@ const struct pch_gpio_set1 pch_gpio_set1_invert = {
* GPIO SET 2 includes GPIO32 to GPIO63
*/
-const struct pch_gpio_set2 pch_gpio_set2_mode = {
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio32 = GPIO_MODE_NATIVE, /* PCI3_CLKRUN# */
.gpio33 = GPIO_MODE_GPIO, /* Onboard Memory Capacity */
.gpio34 = GPIO_MODE_NONE,
@@ -185,7 +185,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio63 = GPIO_MODE_NATIVE, /* CHP3_SLPS5# */
};
-const struct pch_gpio_set2 pch_gpio_set2_direction = {
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio32 = GPIO_DIR_INPUT,
.gpio33 = GPIO_DIR_INPUT,
.gpio34 = GPIO_DIR_INPUT,
@@ -220,7 +220,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio63 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set2 pch_gpio_set2_level = {
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio32 = GPIO_LEVEL_LOW,
.gpio33 = GPIO_LEVEL_LOW,
.gpio34 = GPIO_LEVEL_LOW,
@@ -259,7 +259,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = {
* GPIO SET 3 includes GPIO64 to GPIO75
*/
-const struct pch_gpio_set3 pch_gpio_set3_mode = {
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio64 = GPIO_MODE_NONE,
.gpio65 = GPIO_MODE_NONE,
.gpio66 = GPIO_MODE_NONE,
@@ -274,7 +274,7 @@ const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio75 = GPIO_MODE_NATIVE, /* SIO3_THERM_SMDATA# */
};
-const struct pch_gpio_set3 pch_gpio_set3_direction = {
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio64 = GPIO_DIR_INPUT,
.gpio65 = GPIO_DIR_INPUT,
.gpio66 = GPIO_DIR_INPUT,
@@ -289,7 +289,7 @@ const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio75 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set3 pch_gpio_set3_level = {
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
.gpio64 = GPIO_LEVEL_LOW,
.gpio65 = GPIO_LEVEL_LOW,
.gpio66 = GPIO_LEVEL_LOW,
@@ -304,7 +304,7 @@ const struct pch_gpio_set3 pch_gpio_set3_level = {
.gpio75 = GPIO_LEVEL_LOW,
};
-const struct pch_gpio_set2 pch_gpio_set2_reset = {
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
.gpio38 = GPIO_RESET_RSMRST,
.gpio43 = GPIO_RESET_RSMRST,
};
diff --git a/src/mainboard/samsung/stumpy/gpio.c b/src/mainboard/samsung/stumpy/gpio.c
index eb04c784e2..282f816c53 100644
--- a/src/mainboard/samsung/stumpy/gpio.c
+++ b/src/mainboard/samsung/stumpy/gpio.c
@@ -22,7 +22,7 @@
* GPIO SET 1 includes GPIO0 to GPIO31
*/
-const struct pch_gpio_set1 pch_gpio_set1_mode = {
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio0 = GPIO_MODE_GPIO, /* CHP3_SERDBG */
.gpio1 = GPIO_MODE_GPIO, /* SIO3_EXTSMI# */
.gpio2 = GPIO_MODE_NONE,
@@ -57,7 +57,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = {
.gpio31 = GPIO_MODE_NATIVE, /* ACPRESENT (pullup) */
};
-const struct pch_gpio_set1 pch_gpio_set1_direction = {
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio0 = GPIO_DIR_OUTPUT,
.gpio1 = GPIO_DIR_INPUT,
.gpio2 = GPIO_DIR_INPUT,
@@ -92,7 +92,7 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = {
.gpio31 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set1 pch_gpio_set1_level = {
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
.gpio0 = GPIO_LEVEL_LOW,
.gpio1 = GPIO_LEVEL_LOW,
.gpio2 = GPIO_LEVEL_LOW,
@@ -131,7 +131,7 @@ const struct pch_gpio_set1 pch_gpio_set1_level = {
* GPIO SET 2 includes GPIO32 to GPIO63
*/
-const struct pch_gpio_set2 pch_gpio_set2_mode = {
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio32 = GPIO_MODE_NATIVE, /* PCI3_CLKRUN# */
.gpio33 = GPIO_MODE_NONE,
.gpio34 = GPIO_MODE_NONE,
@@ -166,7 +166,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = {
.gpio63 = GPIO_MODE_NATIVE, /* CHP3_SLPS5# */
};
-const struct pch_gpio_set2 pch_gpio_set2_direction = {
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio32 = GPIO_DIR_INPUT,
.gpio33 = GPIO_DIR_INPUT,
.gpio34 = GPIO_DIR_INPUT,
@@ -201,7 +201,7 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = {
.gpio63 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set2 pch_gpio_set2_level = {
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio32 = GPIO_LEVEL_LOW,
.gpio33 = GPIO_LEVEL_LOW,
.gpio34 = GPIO_LEVEL_LOW,
@@ -240,7 +240,7 @@ const struct pch_gpio_set2 pch_gpio_set2_level = {
* GPIO SET 3 includes GPIO64 to GPIO75
*/
-const struct pch_gpio_set3 pch_gpio_set3_mode = {
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio64 = GPIO_MODE_NATIVE, /* CLK3_SIO48 */
.gpio65 = GPIO_MODE_NONE,
.gpio66 = GPIO_MODE_NONE,
@@ -255,7 +255,7 @@ const struct pch_gpio_set3 pch_gpio_set3_mode = {
.gpio75 = GPIO_MODE_NATIVE, /* SIO3_THERM_SMDATA# */
};
-const struct pch_gpio_set3 pch_gpio_set3_direction = {
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio64 = GPIO_DIR_INPUT,
.gpio65 = GPIO_DIR_INPUT,
.gpio66 = GPIO_DIR_INPUT,
@@ -270,7 +270,7 @@ const struct pch_gpio_set3 pch_gpio_set3_direction = {
.gpio75 = GPIO_DIR_INPUT,
};
-const struct pch_gpio_set3 pch_gpio_set3_level = {
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
.gpio64 = GPIO_LEVEL_LOW,
.gpio65 = GPIO_LEVEL_LOW,
.gpio66 = GPIO_LEVEL_LOW,