diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2013-02-12 15:20:54 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-14 07:07:20 +0100 |
| commit | 0aa37c488bf785466e0db9897805ebf287af48eb (patch) | |
| tree | bbbdb3fd2cd6e9972d44df79e5c1232ba1928111 /src/mainboard/samsung | |
| parent | 398e84c71a15b7db8c631bb5b17d1a1a60c91128 (diff) | |
| download | coreboot-0aa37c488bf785466e0db9897805ebf287af48eb.tar.xz | |
sconfig: rename lapic_cluster -> cpu_cluster
The name lapic_cluster is a bit misleading, since the construct is not local
APIC specific by concept. As implementations and hardware change, be more
generic about our naming. This will allow us to support non-x86 systems without
adding new keywords.
Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2377
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/samsung')
| -rw-r--r-- | src/mainboard/samsung/lumpy/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/devicetree.cb | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb index c2f091d439..cdd7a5c402 100644 --- a/src/mainboard/samsung/lumpy/devicetree.cb +++ b/src/mainboard/samsung/lumpy/devicetree.cb @@ -11,7 +11,7 @@ chip northbridge/intel/sandybridge register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms - device lapic_cluster 0 on + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end end diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index 925b71da52..ee01e8a43e 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -9,7 +9,7 @@ chip northbridge/intel/sandybridge # Enable DVI Hotplug with 6ms pulse register "gpu_dp_b_hotplug" = "0x06" - device lapic_cluster 0 on + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end end |