diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/mainboard/samsung | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
| download | coreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.xz | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/samsung')
| -rw-r--r-- | src/mainboard/samsung/lumpy/acpi_tables.c | 2 | ||||
| -rw-r--r-- | src/mainboard/samsung/lumpy/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/romstage.c | 6 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c index e1364b6cef..0c3d3dbb61 100644 --- a/src/mainboard/samsung/lumpy/acpi_tables.c +++ b/src/mainboard/samsung/lumpy/acpi_tables.c @@ -21,7 +21,7 @@ #include <device/device.h> #include <device/pci.h> #include <ec/acpi/ec.h> -#if IS_ENABLED(CONFIG_CHROMEOS) +#if CONFIG(CHROMEOS) #include <vendorcode/google/chromeos/gnvs.h> #endif #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 1bb0b797d7..74d491f310 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -30,7 +30,7 @@ #include <southbridge/intel/common/gpio.h> #include <halt.h> #include "option_table.h" -#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) +#if CONFIG(DRIVERS_UART_8250IO) #include <superio/smsc/lpc47n207/lpc47n207.h> #endif @@ -39,7 +39,7 @@ void pch_enable_lpc(void) /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); -#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) +#if CONFIG(DRIVERS_UART_8250IO) /* Enable SuperIO + EC + KBC + COM1 + lpc47n207 config*/ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 8370cfe0a8..9450aa1a19 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -30,12 +30,12 @@ #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <halt.h> -#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) +#if CONFIG(DRIVERS_UART_8250IO) #include <superio/smsc/lpc47n207/lpc47n207.h> #endif /* Stumpy USB Reset Disable defined in cmos.layout */ -#if IS_ENABLED(CONFIG_USE_OPTION_TABLE) +#if CONFIG(USE_OPTION_TABLE) #include "option_table.h" #define CMOS_USB_RESET_DISABLE (CMOS_VSTART_stumpy_usb_reset_disable >> 3) #else @@ -52,7 +52,7 @@ void pch_enable_lpc(void) /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); -#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) +#if CONFIG(DRIVERS_UART_8250IO) /* Enable SuperIO + PS/2 Keyboard/Mouse + COM1 + lpc47n207 config*/ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | KBC_LPC_EN |\ CNF2_LPC_EN | COMA_LPC_EN); |