diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 17:21:08 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 11:46:51 +0000 |
| commit | 2b28a160618018b4d7b7930362e1088c2313901b (patch) | |
| tree | 044e169f851fb29f9842f8b14081f1ca64ba63a6 /src/mainboard/samsung | |
| parent | 9c538348d8ccaef2c3dd6b898a1f44b00ea59690 (diff) | |
| download | coreboot-2b28a160618018b4d7b7930362e1088c2313901b.tar.xz | |
sb/intel/bd82x6x: Make the pch_enable_lpc hook optional
This also changes the name to mainboard_pch_lpc_setup to better
reflect that it is an optional mainboard hook.
This adds an empty weakly linked default. The rationale behind this
change is that without an implementation of the hook some features
might not work but that the result is likely still able to boot, so it
can be made optional.
Change-Id: Ie8e6056b4c4aed3739d2d12b4224de36fe217189
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/samsung')
| -rw-r--r-- | src/mainboard/samsung/lumpy/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/romstage.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index ddcf2ad9e6..d6ded7a559 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -33,7 +33,7 @@ #include <superio/smsc/lpc47n207/lpc47n207.h> #endif -void pch_enable_lpc(void) +void mainboard_pch_lpc_setup(void) { /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 06659978e5..35dc055baa 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -45,7 +45,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) -void pch_enable_lpc(void) +void mainboard_pch_lpc_setup(void) { /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); |