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| author | Angel Pons <th3fanbus@gmail.com> | 2021-05-17 11:03:55 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-18 11:42:48 +0000 |
| commit | c56c723deb98d4e97dd55b32aac6fc44a31462b3 (patch) | |
| tree | 1dcb41501885d630e11bf8d7ca3ce9e617262b04 /src/mainboard/sapphire | |
| parent | bceea67461cc44e2c8f10e5d811dcbdc0351ee56 (diff) | |
| download | coreboot-c56c723deb98d4e97dd55b32aac6fc44a31462b3.tar.xz | |
mainboard: Use decimal for `device lapic 0x0 on`
Most boards use `device lapic 0 on` with zero written in decimal.
For the sake of consistency, update the remaining boards to follow suit.
Change-Id: I1d3b1ac107e33aae11189cdd5e719b8e48b10f08
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/sapphire')
| -rw-r--r-- | src/mainboard/sapphire/pureplatinumh61/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb index 253e5edcc2..35c77aa9c7 100644 --- a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb +++ b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge register "acpi_c1" = "1" register "acpi_c2" = "3" register "acpi_c3" = "5" - device lapic 0x0 on end + device lapic 0 on end device lapic 0xacac off end end end |