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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 17:54:01 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-07 10:13:06 +0000 |
| commit | 1fc43aa6f263db2aec76bd9510bf32470a858bae (patch) | |
| tree | 9eba557817e29013c330bbc680323ca6859ac2f1 /src/mainboard/sapphire | |
| parent | e8c8283a267696fad92a139cdd3fe3395051b7d7 (diff) | |
| download | coreboot-1fc43aa6f263db2aec76bd9510bf32470a858bae.tar.xz | |
security/intel/txt: Allow using CF9 reset, too
Soften the hard dependency on SOC_INTEL_COMMON_BLOCK_SA by allowing CF9
resets to be used in place of global resets. If both types of reset are
available, prefer a global reset. This preserves current behavior, and
allows more platforms to use the TXT support code, such as Haswell.
Change-Id: I034fa0b342135e7101c21646be8fd6b5d3252d9e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44181
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/mainboard/sapphire')
0 files changed, 0 insertions, 0 deletions