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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-01 06:13:08 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-06 22:23:19 +0000 |
| commit | 64df52e269d5ec2c04bd7b65381b21d6966326af (patch) | |
| tree | d33259218802b3197b964393c84958c1ec459705 /src/mainboard/sapphire | |
| parent | 081b66951f04bb67ad2d04750212a45fc0c24e90 (diff) | |
| download | coreboot-64df52e269d5ec2c04bd7b65381b21d6966326af.tar.xz | |
AGESA f14: Work around soft-resets
Vendorcode expects some DRAM controller registers to
be writable, but they are actually locked after soft
resets if C6 states are enabled.
Without the workaround, raminit fails on soft resets.
Change-Id: I6b9e275e11b2907d026c13341334983a4d9c8889
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21317
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/sapphire')
0 files changed, 0 insertions, 0 deletions