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authorJulien Viard de Galbert <jviarddegalbert@online.net>2018-03-01 16:03:31 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-05-14 21:03:04 +0000
commit7ebb6b0f00ed6b8f92749cc4b035f02c001197e7 (patch)
tree7ad769f97cbbb0184f09063732802bd0f9cf6734 /src/mainboard/scaleway
parenta78e66e5f4cc032968dc8e6f8e76e550d87dafc8 (diff)
downloadcoreboot-7ebb6b0f00ed6b8f92749cc4b035f02c001197e7.tar.xz
soc/intel/denverton_ns + mb: Rename gpio configuration
In order to use the shared code in intelblock, this patch renames the denverton specific implementation to not use the same names (for files and types). - rename pad_config to remove conflict with soc/.../intelblocks/gpio.h - rename gpio.c, soc/gpio.h to not conflict with intelblock Note: There is no functional change in this patch. Change-Id: Id3f4e2dc0a118e8c864a96a435fa22e32bbe684f Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/24926 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/scaleway')
-rw-r--r--src/mainboard/scaleway/tagada/gpio.h4
-rw-r--r--src/mainboard/scaleway/tagada/romstage.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/scaleway/tagada/gpio.h b/src/mainboard/scaleway/tagada/gpio.h
index d8468f6389..68cf155da0 100644
--- a/src/mainboard/scaleway/tagada/gpio.h
+++ b/src/mainboard/scaleway/tagada/gpio.h
@@ -18,10 +18,10 @@
#ifndef _MAINBOARD_GPIO_H
#define _MAINBOARD_GPIO_H
-#include <soc/gpio.h>
+#include <soc/gpio_dnv.h>
#ifndef __ACPI__
-const struct pad_config tagada_gpio_config[] = {
+const struct dnv_pad_config tagada_gpio_config[] = {
// GBE0_SDP0 (GPIO_14) NC
/*ME { NORTH_ALL_GBE0_SDP0, { GpioPadModeNative1, GpioHostOwnGpio,
GpioDirInOut, GpioOutDefault, GpioIntDefault, GpioResetPwrGood,
diff --git a/src/mainboard/scaleway/tagada/romstage.c b/src/mainboard/scaleway/tagada/romstage.c
index c29ff9dff7..630d355785 100644
--- a/src/mainboard/scaleway/tagada/romstage.c
+++ b/src/mainboard/scaleway/tagada/romstage.c
@@ -31,7 +31,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd);
void mainboard_config_gpios(void)
{
size_t num;
- const struct pad_config *table;
+ const struct dnv_pad_config *table;
printk(BIOS_SPEW, "Board Serial: %s.\n", bmcinfo_serial());
/* Configure pads prior to SiliconInit() in case there's any
@@ -47,7 +47,7 @@ void mainboard_config_gpios(void)
printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n",
(uint32_t)table, (uint32_t)num);
- gpio_configure_pads(table, num);
+ gpio_configure_dnv_pads(table, num);
}
void mainboard_memory_init_params(FSPM_UPD *mupd)