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author | Julien Viard de Galbert <jviarddegalbert@online.net> | 2018-05-02 10:55:25 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-15 11:44:34 +0000 |
commit | 9d217bf79ab8c5ab011dab6cea659c37b3603f42 (patch) | |
tree | 0b09673d80125d72d5b37c0c647b9f9f344d1b07 /src/mainboard/scaleway | |
parent | 52165966f308a66aa1ec31a6dd9e3b61c17ec496 (diff) | |
download | coreboot-9d217bf79ab8c5ab011dab6cea659c37b3603f42.tar.xz |
mb/scaleway/tagada: Set DIMM slot information from mainboard
This field is not provided by the soc code so add it.
TEST=Check the output of 'dmidecode -t memory'
Change-Id: I6fdf3520da62336a5c654575ed8d1f33eb4f4dc5
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/24912
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/scaleway')
-rw-r--r-- | src/mainboard/scaleway/tagada/ramstage.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/scaleway/tagada/ramstage.c b/src/mainboard/scaleway/tagada/ramstage.c index 3ee4a6ebde..341fac048f 100644 --- a/src/mainboard/scaleway/tagada/ramstage.c +++ b/src/mainboard/scaleway/tagada/ramstage.c @@ -20,6 +20,7 @@ #include <fsp/api.h> #include <soc/ramstage.h> #include <smbios.h> +#include <spd.h> #include "bmcinfo.h" @@ -86,3 +87,12 @@ smbios_board_type smbios_mainboard_board_type(void) { return SMBIOS_BOARD_TYPE_SERVER_BLADE; } + +/* Add any mainboard specific information for dimm */ +void mainboard_add_dimm_info( + struct memory_info *mem_info, + int channel, int dimm, int index) +{ + /* Mainboard only has DDR4 DIMM slots */ + mem_info->dimm[index].mod_type = SPD_UDIMM; +} |