summaryrefslogtreecommitdiff
path: root/src/mainboard/siemens/chili/cmos.layout
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-11-03 00:29:39 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-23 09:56:20 +0000
commitc85cce077cc9ded8f33b9b059ce0b165da618639 (patch)
tree6911321c436c40374f2ca7a032524e528cec7a32 /src/mainboard/siemens/chili/cmos.layout
parent2c0aa00d6e562b2e6dbe580e188e24ce5e4336e2 (diff)
downloadcoreboot-c85cce077cc9ded8f33b9b059ce0b165da618639.tar.xz
mb/**/cmos.layout: Indent everything with tabs
Time has shown that using spaces never converges into proper alignment. Change-Id: I5338aeaf139580f9eab3e1e02cb910080a95d2c2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47147 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/siemens/chili/cmos.layout')
-rw-r--r--src/mainboard/siemens/chili/cmos.layout58
1 files changed, 29 insertions, 29 deletions
diff --git a/src/mainboard/siemens/chili/cmos.layout b/src/mainboard/siemens/chili/cmos.layout
index 4a758d9956..740fdb8a3a 100644
--- a/src/mainboard/siemens/chili/cmos.layout
+++ b/src/mainboard/siemens/chili/cmos.layout
@@ -5,54 +5,54 @@ entries
#start-bit length config config-ID name
-0 120 r 0 reserved_memory
+0 120 r 0 reserved_memory
# RTC_BOOT_BYTE (coreboot hardcoded)
-384 1 e 4 boot_option
-388 4 h 0 reboot_counter
+384 1 e 4 boot_option
+388 4 h 0 reboot_counter
# coreboot config options: console
-395 4 e 3 debug_level
+395 4 e 3 debug_level
# coreboot config options: cpu
-400 1 e 2 hyper_threading
-401 1 e 2 vtd
+400 1 e 2 hyper_threading
+401 1 e 2 vtd
# coreboot config options: pch
-408 2 e 4 power_on_after_fail
+408 2 e 4 power_on_after_fail
# coreboot config options: mainboard
-440 1 e 2 ethernet1
+440 1 e 2 ethernet1
# payload config options
-512 256 s 0 boot_devices
-768 8 h 0 boot_default
-784 1 e 1 cmos_defaults_loaded
+512 256 s 0 boot_devices
+768 8 h 0 boot_default
+784 1 e 1 cmos_defaults_loaded
# coreboot config options: check sums
-984 16 h 0 check_sum
+984 16 h 0 check_sum
# -----------------------------------------------------------------
enumerations
-#ID value text
-1 0 No
-1 1 Yes
-2 0 Disable
-2 1 Enable
-3 0 Emergency
-3 1 Alert
-3 2 Critical
-3 3 Error
-3 4 Warning
-3 5 Notice
-3 6 Info
-3 7 Debug
-3 8 Spew
-4 0 Disable
-4 1 Enable
-4 2 Keep
+#ID value text
+1 0 No
+1 1 Yes
+2 0 Disable
+2 1 Enable
+3 0 Emergency
+3 1 Alert
+3 2 Critical
+3 3 Error
+3 4 Warning
+3 5 Notice
+3 6 Info
+3 7 Debug
+3 8 Spew
+4 0 Disable
+4 1 Enable
+4 2 Keep
# -----------------------------------------------------------------
checksums