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author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-03-27 13:25:57 +0200 |
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committer | Werner Zeh <werner.zeh@siemens.com> | 2017-03-29 06:31:52 +0200 |
commit | 2d98120d3b4740c45714b1c75230490bc281ce81 (patch) | |
tree | 486b1fcf82fb5cd2611dfd4e9f3f10fc55b72df4 /src/mainboard/siemens/mc_apl1/romstage.c | |
parent | 2e2370075d24facd0f7ba0c63077f65321c8e9c9 (diff) | |
download | coreboot-2d98120d3b4740c45714b1c75230490bc281ce81.tar.xz |
siemens/mc_apl1: Adjust gpio settings
Adjust gpio settings according to the hardware layout.
Change-Id: I2f440e863c2e6f59298c500ac5aefa3b7386bcdf
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/18995
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1/romstage.c')
-rw-r--r-- | src/mainboard/siemens/mc_apl1/romstage.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_apl1/romstage.c b/src/mainboard/siemens/mc_apl1/romstage.c index 9dd42bcfec..3347f23450 100644 --- a/src/mainboard/siemens/mc_apl1/romstage.c +++ b/src/mainboard/siemens/mc_apl1/romstage.c @@ -47,8 +47,12 @@ static const uint8_t Ch3_Bit_swizzling[] = { void mainboard_memory_init_params(FSPM_UPD *memupd) { + const struct pad_config *pads; + size_t num; + /* setup early gpio before memory */ - gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); + pads = brd_early_gpio_table(&num); + gpio_configure_pads(pads, num); /* DRAM Config settings */ memupd->FspmConfig.Package = 0x1; |