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authorMario Scheithauer <mario.scheithauer@siemens.com>2019-04-02 08:49:37 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-04-08 14:11:21 +0000
commit7935b4a89b5bf9118b2d3a3fc7a1dbde6dc7af23 (patch)
tree35c2b34e3dd54064017c7bd784c2878c3f26a24d /src/mainboard/siemens/mc_apl1
parent83bb2d44b59a77c174bc8d57822e2885bbfcae83 (diff)
downloadcoreboot-7935b4a89b5bf9118b2d3a3fc7a1dbde6dc7af23.tar.xz
siemens/mc_apl5: Remove reduced clock rate for I2C0
There is no device on I2C0 which requires a lower clock rate. Change-Id: Iaf01be5ea4839c54eb2f0ba95bca272970c24bdb Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32139 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb12
1 files changed, 0 insertions, 12 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
index 989ab45699..15be7ffc53 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
@@ -49,18 +49,6 @@ chip soc/intel/apollolake
# Enable Vtd feature
register "enable_vtd" = "1"
- # Intel Common SoC Config
- #+-------------------+---------------------------+
- #| Field | Value |
- #+-------------------+---------------------------+
- #| I2C0 | Proximity Sensor |
- #+-------------------+---------------------------+
- register "common_soc_config" = "{
- .i2c[0] = {
- .speed = I2C_SPEED_STANDARD
- },
- }"
-
device domain 0 on
device pci 00.0 on end # - Host Bridge
device pci 00.1 off end # - DPTF