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authorMario Scheithauer <mario.scheithauer@siemens.com>2019-01-29 08:38:54 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-30 11:00:46 +0000
commitddf84986d540e275cee906933637480f526530a5 (patch)
tree1e2399520f4de15e3609a36cc7c422a67b560b7f /src/mainboard/siemens/mc_apl1
parent67be491458198f90803440e41cabe79f58afaae2 (diff)
downloadcoreboot-ddf84986d540e275cee906933637480f526530a5.tar.xz
siemens/mc_apl2: Correct whitespace of devicetree
Change-Id: Ie0e11b1ce6c6acb1b74ce1196304f7e6ac4664d9 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/31137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
index d2d5394fcf..e54444ac65 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
@@ -84,17 +84,17 @@ chip soc/intel/apollolake
device i2c 0x32 on end # RTC RX6110 SA
end
end
- device pci 16.1 on end # - I2C 1
- device pci 16.2 on end # - I2C 2
- device pci 16.3 on end # - I2C 3
- device pci 17.0 on end # - I2C 4
- device pci 17.1 on end # - I2C 5
- device pci 17.2 on end # - I2C 6
+ device pci 16.1 on end # - I2C 1
+ device pci 16.2 on end # - I2C 2
+ device pci 16.3 on end # - I2C 3
+ device pci 17.0 on end # - I2C 4
+ device pci 17.1 on end # - I2C 5
+ device pci 17.2 on end # - I2C 6
device pci 17.3 on end # - I2C 7
- device pci 18.0 on end # - UART 0
- device pci 18.1 on end # - UART 1
- device pci 18.2 on end # - UART 2
- device pci 18.3 on end # - UART 3
+ device pci 18.0 on end # - UART 0
+ device pci 18.1 on end # - UART 1
+ device pci 18.2 on end # - UART 2
+ device pci 18.3 on end # - UART 3
device pci 19.0 off end # - SPI 0
device pci 19.1 off end # - SPI 1
device pci 19.2 off end # - SPI 2