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authorMario Scheithauer <mario.scheithauer@siemens.com>2019-01-11 14:25:38 +0100
committerNico Huber <nico.h@gmx.de>2019-01-11 18:54:56 +0000
commitdd217362d44f197b08fa69f3c2c14e743e1bc90b (patch)
tree4623ec268d58a8639a8346e11add06e67b4b68fa /src/mainboard/siemens/mc_apl1
parent5ce73e9836761cb9c674fca07fe45fcfb7e20b64 (diff)
downloadcoreboot-dd217362d44f197b08fa69f3c2c14e743e1bc90b.tar.xz
siemens/mc_apl1: Use INTEL_LPSS_UART_FOR_CONSOLE
With the commit a96e66a (soc/intel: Clean mess around UART_DEBUG), an adjustment is necessary for this mainboard. Change-Id: I0fb6288959f8bcb45c4cc93cc132f31a5ab2a5ad Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/30836 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1')
-rw-r--r--src/mainboard/siemens/mc_apl1/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/Kconfig
index 7ec843ba03..196ca28cdc 100644
--- a/src/mainboard/siemens/mc_apl1/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SIEMENS_BASEBOARD_MC_APL1
select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_TABLES
select USE_SIEMENS_HWILIB
+ select INTEL_LPSS_UART_FOR_CONSOLE
source "src/mainboard/siemens/mc_apl1/variants/*/Kconfig"
@@ -34,6 +35,9 @@ config MAINBOARD_PART_NUMBER
default "MC APL4" if BOARD_SIEMENS_MC_APL4
default "MC APL5" if BOARD_SIEMENS_MC_APL5
+config UART_FOR_CONSOLE
+ default 2
+
config MAX_CPUS
int
default 8