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authorFurquan Shaikh <furquan@google.com>2016-05-06 09:20:35 -0700
committerFurquan Shaikh <furquan@google.com>2016-05-09 05:02:22 +0200
commit1e162bf8bd74e8dcd0b164b627e1d536c7dbd5f5 (patch)
tree87075c54a86acd79027ea76927024882d380994e /src/mainboard/siemens/mc_tcu3
parent94b18a1757e66c2e3094bd1116a88db36cbb4f79 (diff)
downloadcoreboot-1e162bf8bd74e8dcd0b164b627e1d536c7dbd5f5.tar.xz
lib/prog_loaders: Allow platforms to skip stage cache
Before multi-CBFS support was added, x86 platforms cached their ramstage in TSEG so that it could be re-used on the resume path. However, more resources/assets are being put in cbfs that are utilized during ramstage. Just caching ramstage does not mean that correct cbfs region is used for all the data. Thus, provide an option to allow platforms to skip caching any component for resume. Change-Id: I0e957a6b859cc7d700aaff67209a17c6558be5de Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14636 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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