diff options
author | Aaron Durbin <adurbin@chromium.org> | 2013-09-23 14:15:42 -0500 |
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committer | Aaron Durbin <adurbin@google.com> | 2014-01-31 20:41:42 +0100 |
commit | ba170b477514239daf92dc7f4333318c96f275bc (patch) | |
tree | 24db9c0f6f4a35d29baa5ac746a63562e2c9e9c8 /src/mainboard/siemens/sitemp_g1p1 | |
parent | 81d3a2277c002e8744e34773442dc239e1c217e9 (diff) | |
download | coreboot-ba170b477514239daf92dc7f4333318c96f275bc.tar.xz |
baytrail: cache ROM space early in bootblock
Take advantage of the cache early in bootblock. The
intent is to speed up cbfs walking when trying to locate
romstage.
BUG=chrome-os-partner:22857
BRANCH=None
TEST=Built and booted.
Change-Id: If03210103c9782390230915db3b4a9759d172dce
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170426
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4849
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/siemens/sitemp_g1p1')
0 files changed, 0 insertions, 0 deletions