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author | Duncan Laurie <dlaurie@chromium.org> | 2018-03-14 09:11:20 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2018-03-16 04:18:51 +0000 |
commit | 211bb97c67ce704fb40abb6dd9971790652237e3 (patch) | |
tree | ae0195ea9ae267742c755f71b5dc584f23c7a24e /src/mainboard/siemens | |
parent | 1356d6288bc85ae8784daef8d663acef9593d19a (diff) | |
download | coreboot-211bb97c67ce704fb40abb6dd9971790652237e3.tar.xz |
mb/google/eve: Update DPTF parameters
1) Set the critical temperature threshold to 100C to match changes
on other boards. This is intended to reduce DPTF-initiated thermal
shutdowns before it has had a chance to react.
2) Reduce the CPU passive threshold sample rate from 5 seconds to 1
second so DPTF will react faster to rapid temperature increases.
BUG=b:67459049
BRANCH=eve
TEST=manual performance/power testing on Eve hardware
Change-Id: Ib660dcb25422fea0aa692fac5ba65b49808965ba
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/25153
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/siemens')
0 files changed, 0 insertions, 0 deletions