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authorMario Scheithauer <mario.scheithauer@siemens.com>2018-08-22 13:03:55 +0200
committerMartin Roth <martinroth@google.com>2018-08-28 14:18:40 +0000
commit403458e7ec0fae1345cd82128b71d5ab0b66fd77 (patch)
tree43de83e3208afbb6c7feb16aba7d203a127dedeb /src/mainboard/siemens
parent24ad29e83c3b5d46c7ba458a504f63eb034837c7 (diff)
downloadcoreboot-403458e7ec0fae1345cd82128b71d5ab0b66fd77.tar.xz
siemens/mc_apl1: Extend circuit life by clock gating and power gating
The firmware of devices connected to LPC should deassert the LPC CLKRUN# signal when there is no bus activity on LPC. Necessary changes: - Enable LPC CLKRUN# - Enable LPC PCE (Power Control Enable) - Enable LPC CCE (Clock Control Enable) - Remove I/O decoding range on LPC for COM 3 - Disable I/O UART driver Change-Id: I2fd80e3fdcf23658f97b8182a77df7e09ddf25d6 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/28268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c4
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c14
3 files changed, 13 insertions, 6 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
index 02d0601482..28aad8aa92 100644
--- a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
@@ -84,7 +84,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(LPC_AD1, NONE, DEEP, NF1), /* LPC_AD1 */
PAD_CFG_NF(LPC_AD2, NONE, DEEP, NF1), /* LPC_AD2 */
PAD_CFG_NF(LPC_AD3, NONE, DEEP, NF1), /* LPC_AD3 */
- PAD_CFG_GPI(LPC_CLKRUNB, NONE, DEEP), /* LPC_CLKRUN_N */
+ PAD_CFG_NF(LPC_CLKRUNB, NONE, DEEP, NF1), /* LPC_CLKRUN_N */
PAD_CFG_NF(LPC_FRAMEB, NONE, DEEP, NF1), /* LPC_FRAME_N */
/* West Community */
@@ -402,7 +402,7 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(LPC_AD1, NONE, DEEP, NF1), /* LPC_AD1 */
PAD_CFG_NF(LPC_AD2, NONE, DEEP, NF1), /* LPC_AD2 */
PAD_CFG_NF(LPC_AD3, NONE, DEEP, NF1), /* LPC_AD3 */
- PAD_CFG_GPI(LPC_CLKRUNB, NONE, DEEP), /* LPC_CLKRUN_N */
+ PAD_CFG_NF(LPC_CLKRUNB, NONE, DEEP, NF1), /* LPC_CLKRUN_N */
PAD_CFG_NF(LPC_FRAMEB, NONE, DEEP, NF1), /* LPC_FRAME_N */
};
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
index a265ca3635..1ed260945b 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
@@ -5,7 +5,6 @@ config BOARD_SIEMENS_MC_APL1_VAR
def_bool y
select DRIVER_INTEL_I210
select DRIVERS_I2C_RX6110SA
- select DRIVERS_UART_8250IO
select DRIVER_SIEMENS_NC_FPGA
select NC_FPGA_NOTIFY_CB_READY
select APL_SKIP_SET_POWER_LIMITS
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
index da01ce3905..099b67b01d 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
@@ -42,9 +42,6 @@ void variant_mainboard_final(void)
else
printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
- /* Enable additional I/O decoding range on LPC for COM 3 */
- lpc_open_pmio_window(0x3e8, 8);
-
/*
* PIR6 register mapping for PCIe root ports
* INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#
@@ -55,6 +52,17 @@ void variant_mainboard_final(void)
dev = dev_find_device(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XIO2001, 0);
if (dev)
pci_write_config8(dev, 0xd8, 0x3e);
+
+ /* Enable CLKRUN_EN for power gating LPC */
+ lpc_enable_pci_clk_cntl();
+
+ /*
+ * Enable LPC PCE (Power Control Enable) by setting IOSF-SB port 0xD2
+ * offset 0x341D bit3 and bit0.
+ * Enable LPC CCE (Clock Control Enable) by setting IOSF-SB port 0xD2
+ * offset 0x341C bit [3:0].
+ */
+ pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN));
}
static void wait_for_legacy_dev(void *unused)