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authorWerner Zeh <werner.zeh@siemens.com>2019-11-11 14:17:27 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-12 18:21:57 +0000
commit1b8102474e4b85935719cd7551f047ede807ee02 (patch)
tree205905673664c0ddbb8d6c10a49d6c0087a6b4f8 /src/mainboard/siemens
parent71a94301c08311ce385360f7c152497496295dde (diff)
downloadcoreboot-1b8102474e4b85935719cd7551f047ede807ee02.tar.xz
mb/siemens/mc_apl6: Enable VT-d feature
This mainboard needs VT-d to be enabled. Do so in devicetree. Change-Id: I9f2f733163be019ac329660d7633b48c5d7896f1 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
index e12972ccd8..3b52f65398 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
@@ -14,6 +14,9 @@ chip soc/intel/apollolake
register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
+ # Enable Vtd feature
+ register "enable_vtd" = "1"
+
device domain 0 on
device pci 00.0 on end # - Host Bridge
device pci 00.1 off end # - DPTF