mb/*/*: Remove BROADWELL_DE boards

Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: I3d9b6bb48bfd15c0182448f774e9af1e0c944fd5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36983
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

17 files changed, 0 insertions, 1189 deletions

diff --git a/src/mainboard/siemens/mc_bdx1/Kconfig b/src/mainboard/siemens/mc_bdx1/Kconfig
deleted file mode 100644
index 006758219a..0000000000
--- a/src/mainboard/siemens/mc_bdx1/Kconfig
+++ /dev/null
@@ -1,63 +0,0 @@
-if BOARD_SIEMENS_MC_BDX1
-
-config BOARD_SPECIFIC_OPTIONS
-	def_bool y
-	select SOC_INTEL_FSP_BROADWELL_DE
-	select BOARD_ROMSIZE_KB_16384
-	select HAVE_ACPI_TABLES
-	select HAVE_OPTION_TABLE
-	select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
-	select CBFS_AUTOGEN_ATTRIBUTES
-	select USE_SIEMENS_HWILIB
-	select DRIVER_INTEL_I210
-	select DRIVER_SIEMENS_NC_FPGA
-	select DRIVERS_I2C_RX6110SA
-	select DRIVERS_I2C_PCA9538
-	select MAINBOARD_HAS_TPM2
-	select MAINBOARD_HAS_LPC_TPM
-
-config VBOOT
-	select VBOOT_MEASURED_BOOT
-	select VBOOT_VBNV_FLASH
-	select VBOOT_NO_BOARD_SUPPORT
-	select GBB_FLAG_DISABLE_LID_SHUTDOWN
-	select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
-	select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
-	select GBB_FLAG_DISABLE_FWMP
-
-config FMDFILE
-	string
-	default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/mc_bdx1.fmd" if VBOOT
-
-config MAINBOARD_DIR
-	string
-	default "siemens/mc_bdx1"
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "MC BDX1"
-
-config IRQ_SLOT_COUNT
-	int
-	default 18
-
-config CBFS_SIZE
-	hex
-	default 0x00D00000 if !VBOOT
-
-config VIRTUAL_ROM_SIZE
-	hex
-	default 0x1000000
-
-config INTEGRATED_UART
-	bool
-	default n
-
-config DRIVERS_UART_8250IO
-	def_bool y
-
-config FSP_PACKAGE_DEFAULT
-	bool "Configure defaults for the Intel FSP package"
-	default n
-
-endif # BOARD_SIEMENS_MC_BDX1
diff --git a/src/mainboard/siemens/mc_bdx1/Kconfig.name b/src/mainboard/siemens/mc_bdx1/Kconfig.name
deleted file mode 100644
index b37cee30fc..0000000000
--- a/src/mainboard/siemens/mc_bdx1/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_SIEMENS_MC_BDX1
-	bool "MC BDX1"
diff --git a/src/mainboard/siemens/mc_bdx1/Makefile.inc b/src/mainboard/siemens/mc_bdx1/Makefile.inc
deleted file mode 100644
index 1606476d80..0000000000
--- a/src/mainboard/siemens/mc_bdx1/Makefile.inc
+++ /dev/null
@@ -1,16 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2012 Google Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-ramstage-y += irqroute.c
diff --git a/src/mainboard/siemens/mc_bdx1/acpi/mainboard.asl b/src/mainboard/siemens/mc_bdx1/acpi/mainboard.asl
deleted file mode 100644
index 62944ef353..0000000000
--- a/src/mainboard/siemens/mc_bdx1/acpi/mainboard.asl
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-Device (PWRB)
-{
-	Name(_HID, EisaId("PNP0C0C"))
-}
diff --git a/src/mainboard/siemens/mc_bdx1/acpi/platform.asl b/src/mainboard/siemens/mc_bdx1/acpi/platform.asl
deleted file mode 100644
index 7ffae2e6e0..0000000000
--- a/src/mainboard/siemens/mc_bdx1/acpi/platform.asl
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* The APM port can be used for generating software SMIs */
-
-OperationRegion (APMP, SystemIO, 0xb2, 2)
-Field (APMP, ByteAcc, NoLock, Preserve)
-{
-	APMC, 8,	// APM command
-	APMS, 8		// APM status
-}
-
-/* Port 80 POST */
-
-OperationRegion (POST, SystemIO, 0x80, 1)
-Field (POST, ByteAcc, Lock, Preserve)
-{
-	DBG0, 8
-}
-
-Name(\APC1, Zero) // IIO IOAPIC
-
-Name(\PICM, Zero) // IOAPIC/8259
-
-Method(_PIC, 1)
-{
-	Store(Arg0, PICM)
-}
-
-/* The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
-	Return(Package(){0,0})
-}
diff --git a/src/mainboard/siemens/mc_bdx1/acpi_tables.c b/src/mainboard/siemens/mc_bdx1/acpi_tables.c
deleted file mode 100644
index 0197def7a7..0000000000
--- a/src/mainboard/siemens/mc_bdx1/acpi_tables.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/ioapic.h>
-#include <soc/acpi.h>
-#include <soc/iomap.h>
-
-extern const unsigned char AmlCode[];
-
-unsigned long acpi_fill_madt(unsigned long current)
-{
-	u32 i;
-
-	current = acpi_create_madt_lapics(current);
-
-	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 8,
-		IOXAPIC1_BASE_ADDRESS, 0);
-	set_ioapic_id((u8 *)IOXAPIC1_BASE_ADDRESS, 8);
-
-	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 9,
-		IOXAPIC2_BASE_ADDRESS, 24);
-	set_ioapic_id((u8 *)IOXAPIC2_BASE_ADDRESS, 9);
-
-	current = acpi_madt_irq_overrides(current);
-
-	for (i = 0; i < 16; i++)
-		current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, i, 0xD, 1);
-
-	return current;
-}
diff --git a/src/mainboard/siemens/mc_bdx1/board_info.txt b/src/mainboard/siemens/mc_bdx1/board_info.txt
deleted file mode 100644
index 15b66c195e..0000000000
--- a/src/mainboard/siemens/mc_bdx1/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Board name: MC BDX1
-Category: misc
-ROM protocol: SPI
-ROM socketed: no
-Release year: 2016
diff --git a/src/mainboard/siemens/mc_bdx1/cmos.layout b/src/mainboard/siemens/mc_bdx1/cmos.layout
deleted file mode 100644
index 3c5bc3b03d..0000000000
--- a/src/mainboard/siemens/mc_bdx1/cmos.layout
+++ /dev/null
@@ -1,119 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007-2008 coresystems GmbH
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-# -----------------------------------------------------------------
-entries
-
-#start-bit length  config config-ID    name
-#0            8       r       0        seconds
-#8            8       r       0        alarm_seconds
-#16           8       r       0        minutes
-#24           8       r       0        alarm_minutes
-#32           8       r       0        hours
-#40           8       r       0        alarm_hours
-#48           8       r       0        day_of_week
-#56           8       r       0        day_of_month
-#64           8       r       0        month
-#72           8       r       0        year
-# -----------------------------------------------------------------
-# Status Register A
-#80           4       r       0        rate_select
-#84           3       r       0        REF_Clock
-#87           1       r       0        UIP
-# -----------------------------------------------------------------
-# Status Register B
-#88           1       r       0        auto_switch_DST
-#89           1       r       0        24_hour_mode
-#90           1       r       0        binary_values_enable
-#91           1       r       0        square-wave_out_enable
-#92           1       r       0        update_finished_enable
-#93           1       r       0        alarm_interrupt_enable
-#94           1       r       0        periodic_interrupt_enable
-#95           1       r       0        disable_clock_updates
-# -----------------------------------------------------------------
-# Status Register C
-#96           4       r       0        status_c_rsvd
-#100          1       r       0        uf_flag
-#101          1       r       0        af_flag
-#102          1       r       0        pf_flag
-#103          1       r       0        irqf_flag
-# -----------------------------------------------------------------
-# Status Register D
-#104          7       r       0        status_d_rsvd
-#111          1       r       0        valid_cmos_ram
-# -----------------------------------------------------------------
-# Diagnostic Status Register
-#112          8       r       0        diag_rsvd1
-
-# -----------------------------------------------------------------
-0          120       r       0        reserved_memory
-#120        264       r       0        unused
-
-# -----------------------------------------------------------------
-# RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
-#390          2       r       0        unused?
-
-# -----------------------------------------------------------------
-# coreboot config options: console
-#392          3       r       0        unused
-395          4       e       6        debug_level
-#399          1       r       0        unused
-
-# coreboot config options: cpu
-400          1       e       2        hyper_threading
-#401          7       r       0        unused
-
-# coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
-#411          5       r       0        unused
-
-# MRC Scrambler Seed values
-896         32        r       0        mrc_scrambler_seed
-928         32        r       0        mrc_scrambler_seed_s3
-
-# coreboot config options: check sums
-984         16       h       0        check_sum
-#1000        24       r       0        amd_reserved
-
-# -----------------------------------------------------------------
-
-enumerations
-
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
-# -----------------------------------------------------------------
-checksums
-
-checksum 392 415 984
diff --git a/src/mainboard/siemens/mc_bdx1/devicetree.cb b/src/mainboard/siemens/mc_bdx1/devicetree.cb
deleted file mode 100644
index fd7d83f854..0000000000
--- a/src/mainboard/siemens/mc_bdx1/devicetree.cb
+++ /dev/null
@@ -1,40 +0,0 @@
-chip soc/intel/fsp_broadwell_de
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on end # SoC router
-		device pci 14.0 on end # xHCI Controller
-		device pci 19.0 on end # Gigabit LAN Controller
-		device pci 1d.0 on end # EHCI Controller
-		device pci 1f.0 on     # LPC Bridge
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-		end # LPC Bridge
-		device pci 1f.2 on end # SATA Controller
-		device pci 1f.3 on
-			# Enable external RTC chip
-			chip drivers/i2c/rx6110sa
-				register "pmon_sampling" = "PMON_SAMPL_256_MS"
-				register "bks_on" = "0"
-				register "bks_off" = "1"
-				register "iocut_en" = "1"
-				register "set_user_date" = "1"
-				register "user_year" = "04"
-				register "user_month" = "07"
-				register "user_day" = "01"
-				register "user_weekday" = "4"
-				device i2c 0x32 on end	# RTC RX6110 SA
-			end
-			#Enable I/O expander
-			chip drivers/i2c/pca9538
-				register "in_out" = "0xff"
-				register "invert" = "0x00"
-				register "out_val" = "0x00"
-				device i2c 0x71 on end # I/O expander
-			end
-		end # SMBus Controller
-		device pci 1f.5 on end # SATA Controller
-	end
-end
diff --git a/src/mainboard/siemens/mc_bdx1/dsdt.asl b/src/mainboard/siemens/mc_bdx1/dsdt.asl
deleted file mode 100644
index 1248703266..0000000000
--- a/src/mainboard/siemens/mc_bdx1/dsdt.asl
+++ /dev/null
@@ -1,294 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/acpi.h>
-DefinitionBlock(
-	"dsdt.aml",
-	"DSDT",
-	0x02,		// DSDT revision: ACPI v2.0 and up
-	OEM_ID,
-	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
-)
-{
-	#include "acpi/platform.asl"
-
-	Name(_S0, Package() { 0x00, 0x00, 0x00, 0x00 })
-	Name(_S5, Package() { 0x07, 0x00, 0x00, 0x00 })
-
-	Scope (\_SB)
-	{
-		Device (PCI0)
-		{
-			#include <acpi/southcluster.asl>
-			#include <acpi/pcie1.asl>
-		}
-
-		Name (PRUN, Package() {
-			Package() { 0x0008FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0008FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0008FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0008FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0009FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0009FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0009FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0009FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000AFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000AFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000AFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000AFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000BFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000BFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000BFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000BFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000DFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000DFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000DFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000EFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000EFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000EFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000EFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x000FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x000FFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x000FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x000FFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0010FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0010FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0010FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0010FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0011FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0011FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0011FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0011FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0012FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0012FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0012FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0012FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0013FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0013FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0013FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0013FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0014FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0014FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0014FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0014FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0016FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0016FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0016FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0016FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0017FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0017FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0017FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0017FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0018FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0018FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0018FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0018FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x0019FFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x0019FFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x0019FFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x0019FFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001CFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001CFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001CFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001CFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001DFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001DFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001DFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001DFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001EFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001EFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001EFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001EFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-
-			Package() { 0x001FFFFF, 0, \_SB.PCI0.LPC0.LNKA, 0 },
-			Package() { 0x001FFFFF, 1, \_SB.PCI0.LPC0.LNKB, 0 },
-			Package() { 0x001FFFFF, 2, \_SB.PCI0.LPC0.LNKC, 0 },
-			Package() { 0x001FFFFF, 3, \_SB.PCI0.LPC0.LNKD, 0 },
-		})
-
-		Name (ARUN, Package() {
-			Package() { 0x0008FFFF, 0, 0, 16 },
-			Package() { 0x0008FFFF, 1, 0, 17 },
-			Package() { 0x0008FFFF, 2, 0, 18 },
-			Package() { 0x0008FFFF, 3, 0, 19 },
-
-			Package() { 0x0009FFFF, 0, 0, 16 },
-			Package() { 0x0009FFFF, 1, 0, 17 },
-			Package() { 0x0009FFFF, 2, 0, 18 },
-			Package() { 0x0009FFFF, 3, 0, 19 },
-
-			Package() { 0x000AFFFF, 0, 0, 16 },
-			Package() { 0x000AFFFF, 1, 0, 17 },
-			Package() { 0x000AFFFF, 2, 0, 18 },
-			Package() { 0x000AFFFF, 3, 0, 19 },
-
-			Package() { 0x000BFFFF, 0, 0, 16 },
-			Package() { 0x000BFFFF, 1, 0, 17 },
-			Package() { 0x000BFFFF, 2, 0, 18 },
-			Package() { 0x000BFFFF, 3, 0, 19 },
-
-			Package() { 0x000CFFFF, 0, 0, 16 },
-			Package() { 0x000CFFFF, 1, 0, 17 },
-			Package() { 0x000CFFFF, 2, 0, 18 },
-			Package() { 0x000CFFFF, 3, 0, 19 },
-
-			Package() { 0x000DFFFF, 0, 0, 16 },
-			Package() { 0x000DFFFF, 1, 0, 17 },
-			Package() { 0x000DFFFF, 2, 0, 18 },
-			Package() { 0x000DFFFF, 3, 0, 19 },
-
-			Package() { 0x000EFFFF, 0, 0, 16 },
-			Package() { 0x000EFFFF, 1, 0, 17 },
-			Package() { 0x000EFFFF, 2, 0, 18 },
-			Package() { 0x000EFFFF, 3, 0, 19 },
-
-			Package() { 0x000FFFFF, 0, 0, 16 },
-			Package() { 0x000FFFFF, 1, 0, 17 },
-			Package() { 0x000FFFFF, 2, 0, 18 },
-			Package() { 0x000FFFFF, 3, 0, 19 },
-
-			Package() { 0x0010FFFF, 0, 0, 16 },
-			Package() { 0x0010FFFF, 1, 0, 17 },
-			Package() { 0x0010FFFF, 2, 0, 18 },
-			Package() { 0x0010FFFF, 3, 0, 19 },
-
-			Package() { 0x0011FFFF, 0, 0, 16 },
-			Package() { 0x0011FFFF, 1, 0, 17 },
-			Package() { 0x0011FFFF, 2, 0, 18 },
-			Package() { 0x0011FFFF, 3, 0, 19 },
-
-			Package() { 0x0012FFFF, 0, 0, 16 },
-			Package() { 0x0012FFFF, 1, 0, 17 },
-			Package() { 0x0012FFFF, 2, 0, 18 },
-			Package() { 0x0012FFFF, 3, 0, 19 },
-
-			Package() { 0x0013FFFF, 0, 0, 16 },
-			Package() { 0x0013FFFF, 1, 0, 17 },
-			Package() { 0x0013FFFF, 2, 0, 18 },
-			Package() { 0x0013FFFF, 3, 0, 19 },
-
-			Package() { 0x0014FFFF, 0, 0, 16 },
-			Package() { 0x0014FFFF, 1, 0, 17 },
-			Package() { 0x0014FFFF, 2, 0, 18 },
-			Package() { 0x0014FFFF, 3, 0, 19 },
-
-			Package() { 0x0016FFFF, 0, 0, 16 },
-			Package() { 0x0016FFFF, 1, 0, 17 },
-			Package() { 0x0016FFFF, 2, 0, 18 },
-			Package() { 0x0016FFFF, 3, 0, 19 },
-
-			Package() { 0x0017FFFF, 0, 0, 16 },
-			Package() { 0x0017FFFF, 1, 0, 17 },
-			Package() { 0x0017FFFF, 2, 0, 18 },
-			Package() { 0x0017FFFF, 3, 0, 19 },
-
-			Package() { 0x0018FFFF, 0, 0, 16 },
-			Package() { 0x0018FFFF, 1, 0, 17 },
-			Package() { 0x0018FFFF, 2, 0, 18 },
-			Package() { 0x0018FFFF, 3, 0, 19 },
-
-			Package() { 0x0019FFFF, 0, 0, 16 },
-			Package() { 0x0019FFFF, 1, 0, 17 },
-			Package() { 0x0019FFFF, 2, 0, 18 },
-			Package() { 0x0019FFFF, 3, 0, 19 },
-
-			Package() { 0x001CFFFF, 0, 0, 16 },
-			Package() { 0x001CFFFF, 1, 0, 17 },
-			Package() { 0x001CFFFF, 2, 0, 18 },
-			Package() { 0x001CFFFF, 3, 0, 19 },
-
-			Package() { 0x001DFFFF, 0, 0, 16 },
-			Package() { 0x001DFFFF, 1, 0, 17 },
-			Package() { 0x001DFFFF, 2, 0, 18 },
-			Package() { 0x001DFFFF, 3, 0, 19 },
-
-			Package() { 0x001EFFFF, 0, 0, 16 },
-			Package() { 0x001EFFFF, 1, 0, 17 },
-			Package() { 0x001EFFFF, 2, 0, 18 },
-			Package() { 0x001EFFFF, 3, 0, 19 },
-
-			Package() { 0x001FFFFF, 0, 0, 16 },
-			Package() { 0x001FFFFF, 1, 0, 17 },
-			Package() { 0x001FFFFF, 2, 0, 18 },
-			Package() { 0x001FFFFF, 3, 0, 19 },
-		})
-
-		Device (UNC0)
-		{
-			Name (_HID, EisaId ("PNP0A03"))
-			Name (_UID, 0x3F)
-			Method (_BBN, 0, NotSerialized)
-			{
-				Return (0xff)
-			}
-
-			Name (_ADR, 0x00)
-			Method (_STA, 0, NotSerialized)
-			{
-				Return (0xf)
-			}
-
-			Name (_CRS, ResourceTemplate ()
-			{
-				WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
-					0x0000,             // Granularity
-					0x00FF,             // Range Minimum
-					0x00FF,             // Range Maximum
-					0x0000,             // Translation Offset
-					0x0001,             // Length
-					,, )
-			})
-
-			Method (_PRT, 0, NotSerialized)
-			{
-				If (LEqual (PICM, Zero))
-				{
-					Return (PRUN)
-				}
-
-				Return (ARUN)
-			}
-		}
-	}
-
-	#include "acpi/mainboard.asl"
-}
diff --git a/src/mainboard/siemens/mc_bdx1/fadt.c b/src/mainboard/siemens/mc_bdx1/fadt.c
deleted file mode 100644
index 5af6056b49..0000000000
--- a/src/mainboard/siemens/mc_bdx1/fadt.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <soc/acpi.h>
-
-void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
-{
-	acpi_header_t *header = &(fadt->header);
-
-	acpi_fill_in_fadt(fadt, facs, dsdt);
-
-	/* Platform specific customizations go here */
-
-	header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
-}
diff --git a/src/mainboard/siemens/mc_bdx1/gpio.h b/src/mainboard/siemens/mc_bdx1/gpio.h
deleted file mode 100644
index 5b5555d204..0000000000
--- a/src/mainboard/siemens/mc_bdx1/gpio.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2017 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef MC_BDX1_GPIO_H_
-#define MC_BDX1_GPIO_H_
-
-#include <soc/gpio.h>
-
-static const struct gpio_config mc_bdx1_gpio_config[] = {
-		PCH_GPIO_OUT_LOW(0),
-		PCH_GPIO_OUT_LOW(1),
-		PCH_GPIO_INPUT(2),
-		PCH_GPIO_INPUT(3),
-		PCH_GPIO_INPUT(4),
-		PCH_GPIO_INPUT(5),
-		PCH_GPIO_OUT_LOW(6),
-		PCH_GPIO_INPUT_INVERT(7),
-		PCH_GPIO_OUT_LOW(8),
-		PCH_GPIO_NATIVE(9),
-		PCH_GPIO_NATIVE(10),
-		PCH_GPIO_NATIVE(11),
-		PCH_GPIO_INPUT(12),
-		PCH_GPIO_NATIVE(14),
-		PCH_GPIO_INPUT_INVERT(15),
-		PCH_GPIO_OUT_LOW(16),
-		PCH_GPIO_NATIVE(17),
-		PCH_GPIO_OUT_HIGH(18),
-		PCH_GPIO_NATIVE(19),
-		PCH_GPIO_NATIVE(20),
-		PCH_GPIO_NATIVE(21),
-		PCH_GPIO_NATIVE(22),
-		PCH_GPIO_NATIVE(23),
-		PCH_GPIO_INPUT(24),
-		PCH_GPIO_OUT_HIGH(25),
-		PCH_GPIO_NATIVE(26),
-		PCH_GPIO_INPUT(27),
-		PCH_GPIO_OUT_HIGH(28),
-		PCH_GPIO_OUT_HIGH(29),
-		PCH_GPIO_NATIVE(30),
-		PCH_GPIO_INPUT(31),
-		PCH_GPIO_NATIVE(32),
-		PCH_GPIO_NATIVE(33),
-		PCH_GPIO_OUT_HIGH(35),
-		PCH_GPIO_NATIVE(36),
-		PCH_GPIO_NATIVE(37),
-		PCH_GPIO_NATIVE(38),
-		PCH_GPIO_NATIVE(39),
-		PCH_GPIO_INPUT(40),
-		PCH_GPIO_INPUT(41),
-		PCH_GPIO_INPUT(42),
-		PCH_GPIO_NATIVE(43),
-		PCH_GPIO_NATIVE(44),
-		PCH_GPIO_NATIVE(45),
-		PCH_GPIO_NATIVE(46),
-		PCH_GPIO_NATIVE(48),
-		PCH_GPIO_INPUT(49),
-		PCH_GPIO_NATIVE(50),
-		PCH_GPIO_NATIVE(51),
-		PCH_GPIO_NATIVE(52),
-		PCH_GPIO_NATIVE(53),
-		PCH_GPIO_NATIVE(54),
-		PCH_GPIO_NATIVE(55),
-		PCH_GPIO_NATIVE(57),
-		PCH_GPIO_NATIVE(58),
-		PCH_GPIO_NATIVE(59),
-		PCH_GPIO_NATIVE(60),
-		PCH_GPIO_NATIVE(61),
-		PCH_GPIO_NATIVE(62),
-		PCH_GPIO_NATIVE(65),
-		PCH_GPIO_OUT_LOW(67),
-		PCH_GPIO_NATIVE(68),
-		PCH_GPIO_NATIVE(69),
-		PCH_GPIO_NATIVE(70),
-		PCH_GPIO_NATIVE(71),
-		PCH_GPIO_INPUT(72),
-		PCH_GPIO_NATIVE(74),
-		PCH_GPIO_NATIVE(75),
-		PCH_GPIO_END
-};
-
-#endif /* MC_BDX1_GPIO_H_ */
diff --git a/src/mainboard/siemens/mc_bdx1/irqroute.c b/src/mainboard/siemens/mc_bdx1/irqroute.c
deleted file mode 100644
index 9b09f4bc1e..0000000000
--- a/src/mainboard/siemens/mc_bdx1/irqroute.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include "../mc_bdx1/irqroute.h"
-
-DEFINE_IRQ_ROUTES;
diff --git a/src/mainboard/siemens/mc_bdx1/irqroute.h b/src/mainboard/siemens/mc_bdx1/irqroute.h
deleted file mode 100644
index 3b437fee55..0000000000
--- a/src/mainboard/siemens/mc_bdx1/irqroute.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- * Copyright (C) 2015-2016 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef IRQROUTE_H
-#define IRQROUTE_H
-
-#include <soc/irq.h>
-#include <soc/pci_devs.h>
-
-#define PCI_DEV_PIRQ_ROUTES \
-	PCI_DEV_PIRQ_ROUTE(XHCI_DEV,  A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(ME_DEV,    A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(GBE_DEV,   A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(EHCI2_DEV, A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(HDA_DEV,   A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(PCIE_DEV,  A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(EHCI1_DEV, A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(SATA_DEV,  A, B, C, D)
-
-/*
- * Route each PIRQ[A-H] to a PIC IRQ[0-15]
- * Reserved: 0, 1, 2, 8, 13
- * ACPI/SCI: 10
- */
-#define PIRQ_PIC_ROUTES \
-	PIRQ_PIC(A,  5), \
-	PIRQ_PIC(B,  6), \
-	PIRQ_PIC(C,  7), \
-	PIRQ_PIC(D, 10), \
-	PIRQ_PIC(E, 11), \
-	PIRQ_PIC(F, 12), \
-	PIRQ_PIC(G, 14), \
-	PIRQ_PIC(H, 15)
-
-#endif /* IRQROUTE_H */
diff --git a/src/mainboard/siemens/mc_bdx1/mainboard.c b/src/mainboard/siemens/mc_bdx1/mainboard.c
deleted file mode 100644
index 4f9c8406c6..0000000000
--- a/src/mainboard/siemens/mc_bdx1/mainboard.c
+++ /dev/null
@@ -1,273 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 Google Inc.
- * Copyright (C) 2016-2018 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <string.h>
-#include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <device/pci_ids.h>
-#include <device/path.h>
-#include <console/console.h>
-#if CONFIG(VGA_ROM_RUN)
-#include <x86emu/x86emu.h>
-#endif
-#include <device/mmio.h>
-#include <hwilib.h>
-#include <i210.h>
-#include <soc/pci_devs.h>
-#include <soc/irq.h>
-#include <soc/lpc.h>
-#include <bootstate.h>
-#include <timer.h>
-#include <timestamp.h>
-#include <pca9538.h>
-
-#define MAX_PATH_DEPTH		12
-#define MAX_NUM_MAPPINGS	10
-
-/*
- * SPI Opcode Menu setup for SPIBAR lock down
- * should support most common flash chips.
- */
-#define SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */
-#define SPI_OPTYPE_0 0x01 /* Write, no address */
-
-#define SPI_OPMENU_1 0x02 /* BYPR: Byte Program */
-#define SPI_OPTYPE_1 0x03 /* Write, address required */
-
-#define SPI_OPMENU_2 0x03 /* READ: Read Data */
-#define SPI_OPTYPE_2 0x02 /* Read, address required */
-
-#define SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */
-#define SPI_OPTYPE_3 0x00 /* Read, no address */
-
-#define SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */
-#define SPI_OPTYPE_4 0x03 /* Write, address required */
-
-#define SPI_OPMENU_5 0x9f /* RDID: Read ID */
-#define SPI_OPTYPE_5 0x00 /* Read, no address */
-
-#define SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */
-#define SPI_OPTYPE_6 0x03 /* Write, address required */
-
-#define SPI_OPMENU_7 0x0b /* FAST: Fast Read */
-#define SPI_OPTYPE_7 0x02 /* Read, address required */
-
-#define SPI_OPMENU_UPPER ((SPI_OPMENU_7 << 24) | (SPI_OPMENU_6 << 16) | \
-			  (SPI_OPMENU_5 << 8) | SPI_OPMENU_4)
-#define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \
-			  (SPI_OPMENU_1 << 8) | SPI_OPMENU_0)
-
-#define SPI_OPTYPE ((SPI_OPTYPE_7 << 14) | (SPI_OPTYPE_6 << 12) | \
-		    (SPI_OPTYPE_5 << 10) | (SPI_OPTYPE_4 << 8) | \
-		    (SPI_OPTYPE_3 << 6) | (SPI_OPTYPE_2 << 4) | \
-		    (SPI_OPTYPE_1 << 2) | (SPI_OPTYPE_0))
-
-#define SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */
-
-#define SPIBAR_OFFSET		0x3800
-#define SPI_REG_PREOP		0x94
-#define SPI_REG_OPTYPE		0x96
-#define SPI_REG_OPMENU_L	0x98
-#define SPI_REG_OPMENU_H	0x9c
-
-/* Define the slave address for the I/O expander. */
-#define PCA9538_SLAVE_ADR	0x71
-/*
- * mainboard_enable is executed as first thing after enumerate_buses().
- * This is the earliest point to add customization.
- */
-static void mainboard_enable(struct device *dev)
-{
-
-}
-
-static void mainboard_init(void *chip_info)
-{
-	uint8_t actl = 0;
-	struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
-
-	/* Route SCI to IRQ 10 to free IRQ 9 slot. */
-	actl = pci_read_config8(dev, ACPI_CNTL_OFFSET);
-	actl &= ~SCIS_MASK;
-	actl |= SCIS_IRQ10;
-	pci_write_config8(dev, ACPI_CNTL_OFFSET, actl);
-
-	/* Enable additional I/O decoding ranges on LPC for COM 3 and COM 4 */
-	pci_write_config32(dev, LPC_GEN1_DEC, 0x1C02E9);
-	pci_write_config32(dev, LPC_GEN2_DEC, 0x1C03E9);
-}
-
-static void mainboard_final(void *chip_info)
-{
-	void *spi_base = NULL;
-	uint32_t rcba = 0;
-	struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
-
-	/* Get address of SPI controller. */
-	rcba = (pci_read_config32(dev, 0xf0) & 0xffffc000);
-	if (!rcba)
-		return;
-	spi_base = (void *)(rcba + SPIBAR_OFFSET);
-	/* Setup OPCODE menu */
-	write16((spi_base + SPI_REG_PREOP), SPI_OPPREFIX);
-	write16((spi_base + SPI_REG_OPTYPE), SPI_OPTYPE);
-	write32((spi_base + SPI_REG_OPMENU_L), SPI_OPMENU_LOWER);
-	write32((spi_base + SPI_REG_OPMENU_H), SPI_OPMENU_UPPER);
-
-	/* Set Master Enable for on-board PCI devices. */
-	dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0);
-	if (dev) {
-		uint16_t cmd = pci_read_config16(dev, PCI_COMMAND);
-		cmd |= PCI_COMMAND_MASTER;
-		pci_write_config16(dev, PCI_COMMAND, cmd);
-	}
-	dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0);
-	if (dev) {
-		uint16_t cmd = pci_read_config16(dev, PCI_COMMAND);
-		cmd |= PCI_COMMAND_MASTER;
-		pci_write_config16(dev, PCI_COMMAND, cmd);
-	}
-	/* Show the mainboard version well-visible on console. */
-	printk(BIOS_NOTICE, "***************************\n"
-			    "* Mainboard version: 0x%02x *\n"
-			    "***************************\n",
-			    pca9538_read_input());
-}
-
-/** \brief This function can decide if a given MAC address is valid or not.
- *         Currently, addresses filled with 0xff or 0x00 are not valid.
- * @param  mac  Buffer to the MAC address to check
- * @return	0 if address is not valid, otherwise 1
- */
-static uint8_t is_mac_adr_valid(uint8_t mac[6])
-{
-	uint8_t buf[6];
-
-	memset(buf, 0, sizeof(buf));
-	if (!memcmp(buf, mac, sizeof(buf)))
-		return 0;
-	memset(buf, 0xff, sizeof(buf));
-	if (!memcmp(buf, mac, sizeof(buf)))
-		return 0;
-	return 1;
-}
- /** \brief This function will search for a MAC address which can be assigned
-  *         to a MACPHY.
-  * @param  dev     pointer to PCI device
-  * @param  mac     buffer where to store the MAC address
-  * @return cb_err  CB_ERR or CB_SUCCESS
-  */
-enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[6])
-{
-	struct bus *parent = dev->bus;
-	uint8_t buf[16], mapping[16], i = 0, chain_len = 0;
-
-	memset(buf, 0, sizeof(buf));
-	memset(mapping, 0, sizeof(mapping));
-
-	/* The first entry in the tree is the device itself. */
-	buf[0] = dev->path.pci.devfn;
-	chain_len = 1;
-	for (i = 1; i < MAX_PATH_DEPTH && parent->dev->bus->subordinate; i++) {
-		buf[i] = parent->dev->path.pci.devfn;
-		chain_len++;
-		parent = parent->dev->bus;
-	}
-	if (i == MAX_PATH_DEPTH) {
-		/* The path is deeper than MAX_PATH_DEPTH devices, error. */
-		printk(BIOS_ERR, "Too many bridges for %s\n", dev_path(dev));
-		return CB_ERR;
-	}
-	/* Now construct the mapping based on the device chain starting from */
-	/* root bridge device to the device itself. */
-	mapping[0] = 1;
-	mapping[1] = chain_len;
-	for (i = 0; i < chain_len; i++)
-		mapping[i + 4] = buf[chain_len - i - 1];
-
-	/* Open main hwinfo block */
-	if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS)
-		return CB_ERR;
-	/* Now try to find a valid MAC address in hwinfo for this mapping.*/
-	for (i = 0; i < MAX_NUM_MAPPINGS; i++) {
-		if ((hwilib_get_field(XMac1Mapping + i, buf, 16) == 16) &&
-			!(memcmp(buf, mapping, chain_len + 4))) {
-		/* There is a matching mapping available, get MAC address. */
-			if ((hwilib_get_field(XMac1 + i, mac, 6) == 6) &&
-			    (is_mac_adr_valid(mac))) {
-				return CB_SUCCESS;
-			} else {
-				return CB_ERR;
-			}
-		} else
-			continue;
-	}
-	/* No MAC address found for */
-	return CB_ERR;
-}
-
-static void wait_for_legacy_dev(void *unused)
-{
-	uint32_t legacy_delay, us_since_boot;
-	struct stopwatch sw;
-
-	/* Open main hwinfo block. */
-	if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS)
-		return;
-
-	/* Get legacy delay parameter from hwinfo. */
-	if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay,
-			      sizeof(legacy_delay)) != sizeof(legacy_delay))
-		return;
-
-	us_since_boot = get_us_since_boot();
-	/* No need to wait if the time since boot is already long enough.*/
-	if (us_since_boot > legacy_delay)
-		return;
-	stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000);
-	printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...",
-			legacy_delay - us_since_boot, legacy_delay);
-	stopwatch_wait_until_expired(&sw);
-	printk(BIOS_NOTICE, "done!\n");
-}
-
-/*
- * To access the I/O expander PCA9538 we need to know its device structure.
- * This function will provide it as mainboard code has the knowledge of the
- * right I2C slave address for the I/O expander.
- */
-struct device *pca9538_get_dev(void)
-{
-	struct device *dev = NULL;
-
-	while ((dev = dev_find_path(dev, DEVICE_PATH_I2C))) {
-		if (dev->path.i2c.device == PCA9538_SLAVE_ADR)
-			break;
-	}
-	return dev;
-}
-
-
-BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL);
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-	.init = mainboard_init,
-	.final = mainboard_final
-};
diff --git a/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd b/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd
deleted file mode 100644
index 44502f607c..0000000000
--- a/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd
+++ /dev/null
@@ -1,25 +0,0 @@
-FLASH@0xff000000 0x1000000 {
-	SI_ALL 0x300000 {
-		SI_DESC 0x1000
-		SI_ME 0x2ff000
-	}
-	SI_BIOS 0xd00000 {
-		RW_MRC_CACHE 0x10000
-		RW_SHARED 0x4000 {
-			SHARED_DATA 0x2000
-			VBLOCK_DEV 0x2000
-		}
-		RW_VPD 0x2000
-		RW_NVRAM 0x2000
-		WP_RO 0xce8000 {
-			RO_VPD 0x4000
-			RO_SECTION 0xce4000 {
-				FMAP 0x800
-				RO_FRID 0x40
-				RO_FRID_PAD 0x7c0
-				GBB 0xef000
-				COREBOOT(CBFS)
-			}
-		}
-	}
-}
diff --git a/src/mainboard/siemens/mc_bdx1/romstage.c b/src/mainboard/siemens/mc_bdx1/romstage.c
deleted file mode 100644
index eec8f04d3d..0000000000
--- a/src/mainboard/siemens/mc_bdx1/romstage.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google Inc.
- * Copyright (C) 2015 Intel Corp.
- * Copyright (C) 2017 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stddef.h>
-#include <soc/romstage.h>
-#include <drivers/intel/fsp1_0/fsp_util.h>
-#include <soc/gpio.h>
-#include "gpio.h"
-
-/**
- * /brief mainboard call for setup that needs to be done before fsp init
- *
- */
-void early_mainboard_romstage_entry(void)
-{
-	init_gpios(mc_bdx1_gpio_config);
-}
-
-/**
- * /brief mainboard call for setup that needs to be done after fsp init
- *
- */
-void late_mainboard_romstage_entry(void)
-{
-
-}
-
-/**
- * /brief customize fsp parameters here if needed
- */
-void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
-{
-
-}