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authorMario Scheithauer <mario.scheithauer@siemens.com>2019-07-10 13:15:54 +0200
committerMartin Roth <martinroth@google.com>2019-07-11 15:14:06 +0000
commit1f21a96c842c285308fd0b433a578ce101483aa1 (patch)
tree670d53d31be99ee8ce68536a80b265f23bfc7b7c /src/mainboard/siemens
parentbadbcde5425b587fe23f8bd6ce02c740913fdd1d (diff)
downloadcoreboot-1f21a96c842c285308fd0b433a578ce101483aa1.tar.xz
mb/siemens/{mc_apl1,...,mc_apl5}: Reduce eMMC bus speed mode
We need to reduce the eMMC bus speed for these Apollo Lake mainboards because of a limitation on Intel side for industry use cases. Change-Id: Ide6a1a302001c0752d149bfdab175a27c8f8cc35 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb2
5 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
index 55e610565f..d65ac4e0a4 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
@@ -44,7 +44,7 @@ chip soc/intel/apollolake
register "emmc_rx_cmd_data_cntl2" = "0x10008"
# 0:HS400(Default), 1:HS200, 2:DDR50
- register "emmc_host_max_speed" = "2"
+ register "emmc_host_max_speed" = "1"
# Intel Common SoC Config
#+-------------------+---------------------------+
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
index a627e3e4aa..bee531f2fa 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
@@ -45,7 +45,7 @@ chip soc/intel/apollolake
register "emmc_rx_cmd_data_cntl2" = "0x10008"
# 0:HS400(Default), 1:HS200, 2:DDR50
- register "emmc_host_max_speed" = "2"
+ register "emmc_host_max_speed" = "1"
# Enable Vtd feature
register "enable_vtd" = "1"
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
index a03f3836ac..e1e79b44ae 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
@@ -44,7 +44,7 @@ chip soc/intel/apollolake
register "emmc_rx_cmd_data_cntl2" = "0x10008"
# 0:HS400(Default), 1:HS200, 2:DDR50
- register "emmc_host_max_speed" = "2"
+ register "emmc_host_max_speed" = "1"
device domain 0 on
device pci 00.0 on end # - Host Bridge
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
index 50207e0e54..fc9885ce7f 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
@@ -45,7 +45,7 @@ chip soc/intel/apollolake
register "emmc_rx_cmd_data_cntl2" = "0x10008"
# 0:HS400(Default), 1:HS200, 2:DDR50
- register "emmc_host_max_speed" = "2"
+ register "emmc_host_max_speed" = "1"
device domain 0 on
device pci 00.0 on end # - Host Bridge
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
index 5f1c9857d4..3b28a26396 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
@@ -44,7 +44,7 @@ chip soc/intel/apollolake
register "emmc_rx_cmd_data_cntl2" = "0x10008"
# 0:HS400(Default), 1:HS200, 2:DDR50
- register "emmc_host_max_speed" = "2"
+ register "emmc_host_max_speed" = "1"
# Enable Vtd feature
register "enable_vtd" = "1"