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author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-06-21 15:23:46 +0200 |
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committer | Werner Zeh <werner.zeh@siemens.com> | 2017-06-23 06:52:15 +0000 |
commit | db666a4d6114e30f2377a6cdaeaaf64b1128290a (patch) | |
tree | 1a7d360f9305db83c05194c8deb41442a7a6b6ba /src/mainboard/siemens | |
parent | 81693d41b1b76528601202d6b1d28a0e474cfcce (diff) | |
download | coreboot-db666a4d6114e30f2377a6cdaeaaf64b1128290a.tar.xz |
siemens/mc_apl1: Disable XDCI
With enabled XDCI support we are not able to use USB port 0 over XHCI
driver. For this reason, we disable XDCI into devicetree.cb.
Change-Id: I1ed721d9ffd44a920a6f1f16855d5b7ceb1b17c5
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/20296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r-- | src/mainboard/siemens/mc_apl1/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/devicetree.cb index 3ad85f62ee..55734a2792 100644 --- a/src/mainboard/siemens/mc_apl1/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/devicetree.cb @@ -61,7 +61,7 @@ chip soc/intel/apollolake device pci 14.0 on end # - RP 0 - PCIe-B 0 - PCIe-PCI-Bridge device pci 14.1 off end # - RP 1 - PCIe-B 1 device pci 15.0 on end # - XHCI - device pci 15.1 on end # - XDCI + device pci 15.1 off end # - XDCI device pci 16.0 on # - I2C 0 # Enable external RTC chip chip drivers/i2c/rx6110sa |