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authorMarc Jones <marc.jones@se-eng.com>2015-10-16 15:30:59 -0600
committerPatrick Georgi <pgeorgi@google.com>2015-10-23 22:39:07 +0200
commit9bb09526fa0f34d011c323a9bb23e62b8df6b8ff (patch)
treec96ccee2999a53131a65c41bfda987ac317af821 /src/mainboard/siemens
parentfc706437cbb82f8f213b5ebf003ebbfc7a189053 (diff)
downloadcoreboot-9bb09526fa0f34d011c323a9bb23e62b8df6b8ff.tar.xz
google/auron: Remove additional SPD file entries
Auron only has three GPIOs for RAMID, so there is no need for sixteen SPD file entries. Only include 8 SPD entries. Change-Id: Icf83719a2a5b9271b29f48cde5c66c4c8ccd07f4 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/12073 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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