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| author | Angel Pons <th3fanbus@gmail.com> | 2020-03-01 02:12:58 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-02 11:51:23 +0000 |
| commit | cfe1016883b711e0a76d3dcbc9151813d648619b (patch) | |
| tree | ab82c33c796b5717d81d50dea3d3b856ead50f5f /src/mainboard/sifive | |
| parent | 59e7a43f9a3bfad60d2ae0078b65deca8d468381 (diff) | |
| download | coreboot-cfe1016883b711e0a76d3dcbc9151813d648619b.tar.xz | |
mb/**/dsdt.asl: Remove outdated sleepstates.asl comment
Previously, each Intel chipset had its own sleepstates.asl file.
However, this is no longer the case, so drop these comments.
This follows commit 408d1dac9e23250c0e485bbf934771f769b717c1.
Change-Id: I0c0f4ad8bf743010ebdd2d53fcf297aeab64a662
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39176
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/sifive')
0 files changed, 0 insertions, 0 deletions