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| author | Angel Pons <th3fanbus@gmail.com> | 2020-04-27 00:14:05 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-05-02 18:56:00 +0000 |
| commit | fada3e56c4d896bcbf41280f0d20ed7c72000890 (patch) | |
| tree | f2a62f182545bc4547203523161772cd9c71261e /src/mainboard/sifive | |
| parent | 76cedd2c292352d7dbd45fab70ec272e476d0910 (diff) | |
| download | coreboot-fada3e56c4d896bcbf41280f0d20ed7c72000890.tar.xz | |
mb/asus/p8h61-m_pro: Fix function of pin 70
The board uses the pin for Deep S5, but the code was setting 3VSBSW.
Change-Id: I81c865358002e6af500658efea851ab8c8202950
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40737
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/sifive')
0 files changed, 0 insertions, 0 deletions