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| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-08-09 02:21:49 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-08-09 02:21:49 +0000 |
| commit | 08af3f535dd4446857e378b5dd87eb8ce35f823b (patch) | |
| tree | f2b9bb3333d0f4f5ffeca8becee256f050e51e67 /src/mainboard/sunw/ultra40/cache_as_ram_auto.c | |
| parent | e53d03c2113ea08e3b604341835504c49333b95b (diff) | |
| download | coreboot-08af3f535dd4446857e378b5dd87eb8ce35f823b.tar.xz | |
mods for the ultra40 bringup. This now builds.
amd gx2 north -- don't set anything in the north, it conflicts with vsa
settings. So we have our own pci_set_resources that is essentially a
no-op -- just calls the kids.
olpc rev_a config -- DISABLE the compressed rom stream. This SHOULD NOT
have been set -- it is untested and caused real trouble.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/sunw/ultra40/cache_as_ram_auto.c')
| -rw-r--r-- | src/mainboard/sunw/ultra40/cache_as_ram_auto.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c index 299f345b71..0ec0b7bac3 100644 --- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c +++ b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c @@ -236,7 +236,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Halt if there was a built in self test failure */ report_bist_failure(bist); - setup_s2895_resource_map(); + setup_ultra40_resource_map(); needs_reset = setup_coherent_ht_domain(); |