some progress on kconfig:

- northbridges are done
- southbridges are done
- Intel CPUs are done, with a design that the board only has to specify
  the socket it has, and the CPUs are pulled in automatically. There is
  some more cleanup possible in that area, but I'll do that later
- a couple more mainboards compile:
  - intel/eagleheights
  - intel/jarrell
  - intel/mtarvon
  - intel/truxton
  - intel/xe7501devkit
  - sunw/ultra40
  - supermicro/h8dme
  - tyan/s2850
  - tyan/s2875
  - via/epia
  - via/epia-cn
  - via/epia-m
  - via/epia-m700
  - via/epia-n
  - via/pc2500e
(PPC not considered, probably overlooked something)

All of them only _build_, but some options are probably completely
wrong. To be fixed later

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 130 insertions, 0 deletions

diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig
new file mode 100644
index 0000000000..c3e857a367
--- /dev/null
+++ b/src/mainboard/supermicro/h8dme/Kconfig
@@ -0,0 +1,130 @@
+config BOARD_SUPERMICRO_H8DME
+	bool "h8dme"
+	select ARCH_X86
+	select CPU_AMD_K8
+	select CPU_AMD_SOCKET_F
+	select NORTHBRIDGE_AMD_AMDK8
+	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+	select SOUTHBRIDGE_NVIDIA_MCP55
+	select SUPERIO_WINBOND_W83627HF
+	select HAVE_PIRQ_TABLE
+	select USE_PRINTK_IN_CAR
+	select USE_DCACHE_RAM
+	help
+	 h8dme
+
+config MAINBOARD_DIR
+	string
+	default supermicro/h8dme
+	depends on BOARD_SUPERMICRO_H8DME
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on BOARD_SUPERMICRO_H8DME
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+	depends on BOARD_SUPERMICRO_H8DME
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on BOARD_SUPERMICRO_H8DME
+
+config APIC_ID_OFFSET
+	hex
+	default 0x10
+	depends on BOARD_SUPERMICRO_H8DME
+
+config HAVE_HARD_RESET
+	bool
+	default y
+	depends on BOARD_SUPERMICRO_H8DME
+
+config IOAPIC
+	bool
+	default y
+	depends on BOARD_SUPERMICRO_H8DME
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_SUPERMICRO_H8DME
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	bool
+	default n
+	depends on BOARD_SUPERMICRO_H8DME
+
+config LB_CKS_RANGE_END
+	int
+	default 122
+	depends on BOARD_SUPERMICRO_H8DME
+
+config LB_CKS_LOC
+	int
+	default 123
+	depends on BOARD_SUPERMICRO_H8DME
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "ultra40"
+	depends on BOARD_SUPERMICRO_H8DME
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on BOARD_SUPERMICRO_H8DME
+
+config HAVE_FAILOVER_BOOT
+	bool
+	default n
+	depends on BOARD_SUPERMICRO_H8DME
+
+config USE_FAILOVER_IMAGE
+	bool
+	default n
+	depends on BOARD_SUPERMICRO_H8DME
+
+config MAX_CPUS
+	int
+	default 4
+	depends on BOARD_SUPERMICRO_H8DME
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 2
+	depends on BOARD_SUPERMICRO_H8DME
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_SUPERMICRO_H8DME
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0x0
+	depends on BOARD_SUPERMICRO_H8DME
+
+config USE_INIT
+	bool
+	default n
+	depends on BOARD_SUPERMICRO_H8DME
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 2
+	depends on BOARD_SUPERMICRO_H8DME
+
+config CONSOLE_VGA
+	bool
+	default y
+	depends on BOARD_SUPERMICRO_H8DME
+
+config PCI_ROM_RUN
+	bool
+	default y
+	depends on BOARD_SUPERMICRO_H8DME
+