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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 14:10:28 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 14:10:28 +0000 |
| commit | 00f0267f7805f6d27d78c1ed586ac0f13c90637b (patch) | |
| tree | 1f7501094bfe358b0e0d09159e3402c3504bf4f8 /src/mainboard/supermicro/h8dmr/Kconfig | |
| parent | 91ff0df62777a9ec4a399ef899803c05e7caad60 (diff) | |
| download | coreboot-00f0267f7805f6d27d78c1ed586ac0f13c90637b.tar.xz | |
Remaining boards are Kconfig'd now. Whether they work
or not still depends on how close the configuration
options are to what they should be.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/h8dmr/Kconfig')
| -rw-r--r-- | src/mainboard/supermicro/h8dmr/Kconfig | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig new file mode 100644 index 0000000000..4cb20f4c60 --- /dev/null +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -0,0 +1,104 @@ +config BOARD_SUPERMICRO_H8DMR + bool "H8DMR" + select ARCH_X86 + select CPU_AMD_K8 + select CPU_AMD_SOCKET_F + select NORTHBRIDGE_AMD_AMDK8 + select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX + select SOUTHBRIDGE_NVIDIA_MCP55 + select SUPERIO_WINBOND_W83627HF + select HAVE_PIRQ_TABLE + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM + select HAVE_HARD_RESET + select IOAPIC + +config MAINBOARD_DIR + string + default supermicro/h8dmr + depends on BOARD_SUPERMICRO_H8DMR + +config DCACHE_RAM_BASE + hex + default 0xc8000 + depends on BOARD_SUPERMICRO_H8DMR + +config DCACHE_RAM_SIZE + hex + default 0x08000 + depends on BOARD_SUPERMICRO_H8DMR + +config DCACHE_RAM_GLOBAL_VAR_SIZE + hex + default 0x01000 + depends on BOARD_SUPERMICRO_H8DMR + +config APIC_ID_OFFSET + hex + default 0x10 + depends on BOARD_SUPERMICRO_H8DMR + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_SUPERMICRO_H8DMR + +config SB_HT_CHAIN_UNITID_OFFSET_ONLY + bool + default n + depends on BOARD_SUPERMICRO_H8DMR + +config LB_CKS_RANGE_END + int + default 122 + depends on BOARD_SUPERMICRO_H8DMR + +config LB_CKS_LOC + int + default 123 + depends on BOARD_SUPERMICRO_H8DMR + +config MAINBOARD_PART_NUMBER + string + default "H8DMR" + depends on BOARD_SUPERMICRO_H8DMR + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_SUPERMICRO_H8DMR + +config MAX_CPUS + int + default 4 + depends on BOARD_SUPERMICRO_H8DMR + +config MAX_PHYSICAL_CPUS + int + default 2 + depends on BOARD_SUPERMICRO_H8DMR + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x0 + depends on BOARD_SUPERMICRO_H8DMR + +config HT_CHAIN_UNITID_BASE + hex + default 0x0 + depends on BOARD_SUPERMICRO_H8DMR + +config USE_INIT + bool + default n + depends on BOARD_SUPERMICRO_H8DMR + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_SUPERMICRO_H8DMR + +config IRQ_SLOT_COUNT + int + default 11 + depends on BOARD_SUPERMICRO_H8DMR |