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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
commit | 7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch) | |
tree | 5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/supermicro/h8dmr | |
parent | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff) | |
download | coreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz |
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/h8dmr')
-rw-r--r-- | src/mainboard/supermicro/h8dmr/romstage.c | 35 |
1 files changed, 10 insertions, 25 deletions
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index 573f69eb30..d41067a2d2 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -52,14 +52,8 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - -static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { @@ -85,6 +79,7 @@ static void sio_setup(void) { uint32_t dword; uint8_t byte; + enable_smbus(); // smbusx_write_byte(1, (0x58>>1), 0, 0x80); /* select bank0 */ smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */ @@ -105,35 +100,29 @@ static void sio_setup(void) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { - // Node 0 - DIMM0, DIMM2, 0, 0, - DIMM1, DIMM3, 0, 0, - // Node 1 - DIMM4, DIMM6, 0, 0, - DIMM5, DIMM7, 0, 0, + // Node 0 + DIMM0, DIMM2, 0, 0, + DIMM1, DIMM3, 0, 0, + // Node 1 + DIMM4, DIMM6, 0, 0, + DIMM5, DIMM7, 0, 0, }; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - int needs_reset = 0; unsigned bsp_apicid = 0; if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ - enumerate_ht_chain(); - sio_setup(); - - /* Setup the mcp55 */ mcp55_enable_rom(); } - if (bist == 0) { + if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); - } pnp_enter_ext_func_mode(SERIAL_DEV); pnp_write_config(SERIAL_DEV, 0x24, 0x84 | (1 << 6)); @@ -177,13 +166,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) msr=rdmsr(0xc0010042); printk(BIOS_DEBUG, "begin msr fid, vid %08x, %08x\n", msr.hi, msr.lo); } - enable_fid_change(); - enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); - init_fidvid_bsp(bsp_apicid); - // show final fid and vid { msr_t msr; |