diff options
author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 17:59:12 +0000 |
---|---|---|
committer | Myles Watson <mylesgw@gmail.com> | 2010-10-05 17:59:12 +0000 |
commit | abc0c7791e18dbd97949a49016f9ebedb823ed84 (patch) | |
tree | a8c014275fe0c920ccf47f929ec7fe6a151834ea /src/mainboard/supermicro/h8dmr | |
parent | 5692c5733633bfb8b23f1111de152eff0233b713 (diff) | |
download | coreboot-abc0c7791e18dbd97949a49016f9ebedb823ed84.tar.xz |
attached patch moves a couple more config flags out of romstage:
CK804_USE_NIC, CK804_USE_ACI, CK804_NUM.
MCP55_USE_NIC, MCP55_USE_ACI, MCP55_NUM.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Pter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/h8dmr')
-rw-r--r-- | src/mainboard/supermicro/h8dmr/Kconfig | 2 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr/romstage.c | 4 |
2 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig index 7aaad6014f..f7b0de4904 100644 --- a/src/mainboard/supermicro/h8dmr/Kconfig +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -9,6 +9,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_NVIDIA_MCP55 + select MCP55_USE_NIC + select MCP55_USE_AZA select SUPERIO_WINBOND_W83627HF select HAVE_OPTION_TABLE select HAVE_BUS_CONFIG diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index 3a3140d106..ccfce6e119 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -100,10 +100,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" -#define MCP55_NUM 1 -#define MCP55_USE_NIC 1 -#define MCP55_USE_AZA 1 - #define MCP55_PCI_E_X_0 4 #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" |