Add the SuperMicro H8QGI platform

This set adds support for the SuperMicro H8QGI mainboard.
It is a publicly available 4 socket board using AMD Family
10 cpus and AMD SR5650 and SB700 bridges.

Change-Id: I196704f79db4c45382559c5ee0619dc8d96ff140
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/108
Tested-by: build bot (Jenkins)
Reviewed-by: Kerry She <shekairui@gmail.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>

1 files changed, 129 insertions, 0 deletions

diff --git a/src/mainboard/supermicro/h8qgi/Kconfig b/src/mainboard/supermicro/h8qgi/Kconfig
new file mode 100755
index 0000000000..286cb175c9
--- /dev/null
+++ b/src/mainboard/supermicro/h8qgi/Kconfig
@@ -0,0 +1,129 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2011 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+#
+
+if BOARD_SUPERMICRO_H8QGI
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select ARCH_X86
+	select CPU_AMD_AGESA_FAMILY10
+	select NORTHBRIDGE_AMD_AGESA_FAMILY10_ROOT_COMPLEX
+	select NORTHBRIDGE_AMD_AGESA_FAMILY10
+	select SOUTHBRIDGE_AMD_SR5650
+	select SOUTHBRIDGE_AMD_SP5100
+	select SUPERIO_WINBOND_W83627DHG
+	select BOARD_HAS_FADT
+	select HAVE_BUS_CONFIG
+	select HAVE_OPTION_TABLE
+	select HAVE_PIRQ_TABLE
+	select HAVE_MP_TABLE
+	select HAVE_HARD_RESET
+	select SERIAL_CPU_INIT
+	select AMDMCT
+	select HAVE_ACPI_TABLES
+	select BOARD_ROMSIZE_KB_2048
+	select TINY_BOOTBLOCK
+	#select MMCONF_SUPPORT_DEFAULT #TODO enable it to resolve Multicore IO conflict
+
+config AMD_AGESA
+	bool
+	default y
+
+config MAINBOARD_DIR
+	string
+	default supermicro/h8qgi
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "H8QGI"
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x200000
+
+config MAX_CPUS
+	int
+	default 64
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 16
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+
+config MEM_TRAIN_SEQ
+	int
+	default 2
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+
+config RAMTOP
+	hex
+	default 0x1000000
+
+config HEAP_SIZE
+	hex
+	default 0xc0000
+
+config STACK_SIZE
+	hex
+	default 0x10000
+
+config ACPI_SSDTX_NUM
+	int
+	default 0
+
+config RAMBASE
+	hex
+	default 0x200000
+
+config SIO_PORT
+	hex
+	default 0x164E
+	help
+		though UARTs are on the NUVOTON BMC, port 0x164E
+		PS2 keyboard and mouse are on SUPERIO_WINBOND_W83627DHG, port 0x2E
+
+config DRIVERS_PS2_KEYBOARD
+	bool
+	default y
+
+config WARNINGS_ARE_ERRORS
+	bool
+	default n
+
+config ONBOARD_VGA_IS_PRIMARY
+	bool
+	default y
+
+config VGA_BIOS
+	bool
+	default n
+
+config VGA_BIOS_ID
+	string
+	depends on VGA_BIOS
+	default "102b,0532"
+
+endif # BOARD_SUPERMICRO_H8QGI
+