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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-21 19:35:16 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-24 13:59:22 +0200 |
| commit | 0c797f1c28cd16c64482b2cea554e89baaa31445 (patch) | |
| tree | 0eb73249b03eb0609e350250c32b4f0bdab3bcaf /src/mainboard/supermicro/h8qgi/mptable.c | |
| parent | 0ff17c9cae11b46535b99880f013d0ca084ea1f8 (diff) | |
| download | coreboot-0c797f1c28cd16c64482b2cea554e89baaa31445.tar.xz | |
AGESA: Drop offset on PCI device enumeration
Integrated PCI devices in southbridge silicon have static BDFs,
no need to have variables to store the parent bus or an offset
with constant zero.
Change-Id: I37d3794d36b5e5775da9215574ddc199696646d0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6333
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/supermicro/h8qgi/mptable.c')
| -rw-r--r-- | src/mainboard/supermicro/h8qgi/mptable.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/supermicro/h8qgi/mptable.c b/src/mainboard/supermicro/h8qgi/mptable.c index 754ed549bf..3793212711 100644 --- a/src/mainboard/supermicro/h8qgi/mptable.c +++ b/src/mainboard/supermicro/h8qgi/mptable.c @@ -29,7 +29,6 @@ #include <cpu/amd/amdfam10_sysconf.h> extern u8 bus_sp5100[2]; -extern u32 sbdn_sp5100; static void *smp_write_config_table(void *v) { @@ -59,7 +58,7 @@ static void *smp_write_config_table(void *v) apicid_sp5100 = CONFIG_MAX_CPUS + 1; apicid_sr5650 = apicid_sp5100 + 1; - dev = dev_find_slot(0, PCI_DEVFN(sbdn_sp5100 + 0x14, 0)); + dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); if (dev) { /* Set SP5100 IOAPIC ID */ dword = pci_read_config32(dev, 0x74) & 0xfffffff0; |