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authorKerry Sheh <shekairui@gmail.com>2012-02-07 20:32:38 +0800
committerMarc Jones <marcj303@gmail.com>2012-02-16 21:19:09 +0100
commita3f060748b692e50b7e3856ef37a731d3c76451c (patch)
treee4e0ecea25e723172646f5f0a976beb9250fa188 /src/mainboard/supermicro/h8qgi/platform_oem.c
parentc55f5a0e07eaa7238b47f12f8c134eab319e8714 (diff)
downloadcoreboot-a3f060748b692e50b7e3856ef37a731d3c76451c.tar.xz
Mainboard: Supermicro/h8qgi mainboard update
1. Supermicro H8QGI mainboard update to support both family10 Revison D processor and family15 model 00-0fh processor in one binary image. 2. RD890/SR56X0 IO hub CIMX wrapper support. 3. SP5100/SB700 southbridge CIMX wrapper support. Both 8 cores and 16 Cores InterLagos Opteron Processor are tested on this platform. Debian Linux 5.0 and Windows Server 2008 R2 Statdard are tested. Change-Id: Iaad8c9b08310813441188deee6797b3f6dd37d6d Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/567 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/supermicro/h8qgi/platform_oem.c')
-rw-r--r--src/mainboard/supermicro/h8qgi/platform_oem.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/supermicro/h8qgi/platform_oem.c b/src/mainboard/supermicro/h8qgi/platform_oem.c
index f36b0d83b8..883cad10d9 100644
--- a/src/mainboard/supermicro/h8qgi/platform_oem.c
+++ b/src/mainboard/supermicro/h8qgi/platform_oem.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,7 +21,6 @@
#include "amdlib.h"
#include "Ids.h"
#include "heapManager.h"
-#include "platform_oem.h"
#include "Filecode.h"
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
@@ -43,6 +42,7 @@
*
**/
/*---------------------------------------------------------------------------------------*/
+VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly);
VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly)
{
//InitEarly->PlatformConfig.CoreLevelingMode = CORE_LEVEL_TWO;