mb/supermicro/x11ssh: Add Supermicro X11SSH-TF

Add support for the X11SSH-TF which is based on Intel KBL.

Working:
* SeaBIOS payload
* LinuxBoot payload
* IPMI of BMC
* PCIe, SATA, USB and M.2 ports
* RS232 serial
* Native graphics init

Not working:
* TianoCore doesn't work yet as the Aspeed NGI is text mode only.
* Intel SGX, due to random crashes in soc/intel/common

For more details have a look at the documentation.

Please apply those patches as well for good user experience:

Ica0c20255f661dd61edc3a7d15646b7447c4658e

Signed-off-by: Christian Walter <christian.walter@9elements.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Felix Singer <felix.singer@9elements.com>
Change-Id: I2edaa4a928de3a065e517c0f20e3302b4b702323
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32734
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>

1 files changed, 48 insertions, 0 deletions

diff --git a/src/mainboard/supermicro/x11ssh/bootblock.c b/src/mainboard/supermicro/x11ssh/bootblock.c
new file mode 100644
index 0000000000..8bc8ab00e5
--- /dev/null
+++ b/src/mainboard/supermicro/x11ssh/bootblock.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <soc/gpio.h>
+#include "gpio.h"
+#include <superio/aspeed/common/aspeed.h>
+#include <superio/aspeed/ast2400/ast2400.h>
+#include <delay.h>
+#include <console/uart.h>
+
+static void early_config_gpio(void)
+{
+	/* This is a hack for FSP because it does things in MemoryInit()
+	 * which it shouldn't do. We have to prepare certain gpios here
+	 * because of the brokenness in FSP. */
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
+
+static void early_config_superio(void)
+{
+	const pnp_devfn_t serial_dev = PNP_DEV(0x2e, AST2400_SUART1);
+	if (CONFIG(CONSOLE_SERIAL)) {
+		aspeed_enable_serial(serial_dev, CONFIG_TTYS0_BASE);
+		/* The serial output is garbeled before this timeout.
+		 * FIXME: Find out why and remove delay.
+		 */
+		mdelay(1000);
+	}
+}
+
+void bootblock_mainboard_early_init(void)
+{
+	early_config_gpio();
+	early_config_superio();
+}