diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-29 22:08:01 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-29 22:08:01 +0000 |
commit | 798ef2893c44ce3194c539c8c5db33d11e8edbac (patch) | |
tree | 405318f804b41070e16ca6b907d65a1e27cc5071 /src/mainboard/supermicro/x6dhr_ig2 | |
parent | 72bdfeb6987f9578ac7fee3f21140ab5853d6179 (diff) | |
download | coreboot-798ef2893c44ce3194c539c8c5db33d11e8edbac.tar.xz |
This drops the ASSEMBLY define from romstage.c, too
(since it's not assembly code, this was a dirty hack anyways)
Also run
awk 1 RS= ORS="\n\n" < $FILE > $FILE.nonewlines
mv $FILE.nonewlines $FILE
on romstage.c because my perl -pi -e 's,#define ASSEMBLY 1,,g' */*/romstage.c
cut some holes into the source.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/x6dhr_ig2')
-rw-r--r-- | src/mainboard/supermicro/x6dhr_ig2/romstage.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c index 8e46e928fe..38c06d5000 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c @@ -1,5 +1,3 @@ -#define ASSEMBLY 1 - #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> @@ -25,7 +23,6 @@ #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" - #define SIO_GPIO_BASE 0x680 #define SIO_XBUS_BASE 0x4880 @@ -57,7 +54,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/intel/e7520/raminit.c" #include "lib/generic_sdram.c" - static void main(unsigned long bist) { /* @@ -152,3 +148,4 @@ static void main(unsigned long bist) } #endif } + |