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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-10-09 14:10:28 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-10-09 14:10:28 +0000
commit00f0267f7805f6d27d78c1ed586ac0f13c90637b (patch)
tree1f7501094bfe358b0e0d09159e3402c3504bf4f8 /src/mainboard/supermicro/x6dhr_ig
parent91ff0df62777a9ec4a399ef899803c05e7caad60 (diff)
downloadcoreboot-00f0267f7805f6d27d78c1ed586ac0f13c90637b.tar.xz
Remaining boards are Kconfig'd now. Whether they work
or not still depends on how close the configuration options are to what they should be. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/x6dhr_ig')
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/Kconfig54
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/Makefile.inc24
2 files changed, 78 insertions, 0 deletions
diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig
new file mode 100644
index 0000000000..32a8183d46
--- /dev/null
+++ b/src/mainboard/supermicro/x6dhr_ig/Kconfig
@@ -0,0 +1,54 @@
+config BOARD_SUPERMICRO_X6DHR_IG
+ bool "X6DHR-IG"
+ select ARCH_X86
+ select CPU_INTEL_SOCKET_MPGA604
+ select NORTHBRIDGE_INTEL_E7520
+ select SOUTHBRIDGE_INTEL_I82801ER
+ select SOUTHBRIDGE_INTEL_PXHD
+ select SUPERIO_WINBOND_W83627HF
+ select PIRQ_TABLE
+
+config MAINBOARD_DIR
+ string
+ default supermicro/x6dhr_ig
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "X6DHR_IG"
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x15d9
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x6780
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_SUPERMICRO_X6DHR_IG
+
+config IRQ_SLOT_COUNT
+ int
+ default 15
+ depends on BOARD_SUPERMICRO_X6DHR_IG
diff --git a/src/mainboard/supermicro/x6dhr_ig/Makefile.inc b/src/mainboard/supermicro/x6dhr_ig/Makefile.inc
new file mode 100644
index 0000000000..e697040c94
--- /dev/null
+++ b/src/mainboard/supermicro/x6dhr_ig/Makefile.inc
@@ -0,0 +1,24 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ROMCCFLAGS=-mcpu=p4 -O2
+
+include $(src)/mainboard/Makefile.romccboard.inc
+