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authorStefan Reinauer <stefan.reinauer@coreboot.org>2011-04-20 20:54:07 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-20 20:54:07 +0000
commit42fa7fe28b60b448f501e99ee285a0af12c86d34 (patch)
tree247586f11a5be9dcbea2cbafaede92df058ac14b /src/mainboard/supermicro
parentd8129f92c0cbd6a561195c1628ba3f9f98eccd50 (diff)
downloadcoreboot-42fa7fe28b60b448f501e99ee285a0af12c86d34.tar.xz
run uart_init() from console_init, just like the other console initialization functions.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r--src/mainboard/supermicro/h8dme/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8dmr/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dai_g/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dhe_g/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/romstage.c1
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/romstage.c1
9 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index fe5aa812c0..2cdc4c943e 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -197,7 +197,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 7eeb7f8639..38aef5ea4f 100644
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -126,7 +126,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 50ad6a0584..c9fb928a6d 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -133,9 +133,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
- printk(BIOS_DEBUG, "\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index dbef8e9e10..870125dd1f 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -184,7 +184,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
write_GPIO();
printk(BIOS_DEBUG, "\n");
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index f34f8342ad..8101d2fad2 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -123,7 +123,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
wpcm450_enable_dev(WPCM450_SP1, 0x164E, CONFIG_TTYS0_BASE);
sb7xx_51xx_disable_wideio(0);
- uart_init();
console_init();
diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index 87992cc6e5..830be38d88 100644
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -66,7 +66,6 @@ static void main(unsigned long bist)
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* MOVE ME TO A BETTER LOCATION !!! */
diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 2fb9f229e3..b6c6c1d443 100644
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -66,7 +66,6 @@ static void main(unsigned long bist)
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index 177abb4aff..d86d83d36a 100644
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -66,7 +66,6 @@ static void main(unsigned long bist)
outb(0x87,0x2e);
pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6));
pc87427_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */
diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index e85ea5ab18..e77fe7bad5 100644
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -65,7 +65,6 @@ static void main(unsigned long bist)
w83627hf_set_clksel_48(DUMMY_DEV);
w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
/* Halt if there was a built in self test failure */