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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-13 13:38:17 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-22 20:24:38 +0000 |
| commit | 90e07b460cffb4fbfee336a2b614cb8d08e4bfaa (patch) | |
| tree | 65008aab02605965c161712f1a886575256b2286 /src/mainboard/supermicro | |
| parent | b98391c0ee3d9d95b3c256e3ce170ff52b98b2c4 (diff) | |
| download | coreboot-90e07b460cffb4fbfee336a2b614cb8d08e4bfaa.tar.xz | |
AMD K8 fam10-15: Consolidate post_cache_as_ram call
Change-Id: I5e7890aafbc8c80716ee49690e306482a482a863
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20573
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/mainboard/supermicro')
| -rw-r--r-- | src/mainboard/supermicro/h8dme/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8dmr/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8scm_fam10/romstage.c | 2 |
5 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index 17df141fe4..cacdd41b77 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -213,6 +213,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* all ap stopped? */ sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); - - post_cache_as_ram(); // bsp swtich stack to RAM and copy sysinfo RAM now } diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index c71eaa190e..550bb8925a 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -190,6 +190,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* all ap stopped? */ sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); - - post_cache_as_ram(); // bsp swtich stack to RAM and copy sysinfo RAM now } diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index e100876d5a..eb6edff249 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -245,8 +245,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) amdmct_cbmem_store_info(sysinfo); - post_cache_as_ram(); // BSP switch stack to ram, copy + execute stage 2 - post_code(0x42); // Should never see this post code. } /** diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index 3554a05fce..edede81c09 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -308,8 +308,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) amdmct_cbmem_store_info(sysinfo); - post_cache_as_ram(); /* BSP switch stack to ram, copy then execute CB. */ - post_code(0x42); /* Should never see this post code. */ } /** diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 60288e0329..461eb74bd7 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -234,8 +234,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_before_pci_init(); post_code(0x42); - post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. - post_code(0x43); // Should never see this post code. } /** |