diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-01 11:21:53 +0300 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-07-04 03:10:22 +0200 |
| commit | 9e974232e4896ee971745c5127cbc37f1682171b (patch) | |
| tree | adacdfe76da0f950c518db7f81af96ba98a8c02a /src/mainboard/supermicro | |
| parent | 575e6817e690d1540bfa14a0b1fc7b8a40ef095a (diff) | |
| download | coreboot-9e974232e4896ee971745c5127cbc37f1682171b.tar.xz | |
intel/i5000: Use MMCONF_SUPPORT_DEFAULT
Change all PCI configuration accesses to MMIO on two boards
with i5000 chipset. To enable MMIO style access, add explicit
PCI IO config write in the bootblock.
Change-Id: I26f1c2da5ae98aeeda78bdcae0fb1e8c711a3586
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3601
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/supermicro')
| -rw-r--r-- | src/mainboard/supermicro/x7db8/romstage.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/supermicro/x7db8/romstage.c b/src/mainboard/supermicro/x7db8/romstage.c index fa7341231f..bc54ed7306 100644 --- a/src/mainboard/supermicro/x7db8/romstage.c +++ b/src/mainboard/supermicro/x7db8/romstage.c @@ -128,10 +128,6 @@ void main(unsigned long bist) enable_smbus(); - /* setup PCIe MMCONF base address */ - pci_write_config32(PCI_DEV(0, 16, 0), 0x64, - CONFIG_MMCONF_BASE_ADDRESS >> 16); - outb(0x07, 0x11b8); /* These are smbus write captured with serialice. They |