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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-05-14 11:02:56 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-05-14 11:02:56 +0000
commitc928a295b3c23cc0fad0e40d9ddd9ffff3b0660a (patch)
tree2eb99895ff21ba9875455bcb6b5052a6f1802aff /src/mainboard/supermicro
parent930d32ba8741f059280feba79006da710411faeb (diff)
downloadcoreboot-c928a295b3c23cc0fad0e40d9ddd9ffff3b0660a.tar.xz
Remove another set of includes from Fam10 romstages:
northbridge/amd/amdht/ht_wrapper.c northbridge/amd/amdfam10/raminit_amdmct.c cpu/amd/model_10xxx/fidvid.c pc80/mc146818rtc_early.c They are now included by the fam10 chipset code that requires them. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c4
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 35fae8d0e2..35b46485f4 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -42,7 +42,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
#include "lib/ramtest.c"
@@ -83,10 +82,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdfam10/amdfam10.h"
-#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
-#include "northbridge/amd/amdfam10/raminit_amdmct.c"
#include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c"
@@ -108,7 +105,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_10xxx/update_microcode.c"
#include "cpu/amd/model_10xxx/init_cpus.c"
-#include "cpu/amd/model_10xxx/fidvid.c"
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdfam10/early_ht.c"
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index ff33819f32..f9c03767d6 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -42,7 +42,6 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
#include "lib/ramtest.c"
@@ -86,10 +85,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdfam10/amdfam10.h"
-#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
-#include "northbridge/amd/amdfam10/raminit_amdmct.c"
#include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c"
@@ -113,7 +110,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_10xxx/update_microcode.c"
#include "cpu/amd/model_10xxx/init_cpus.c"
-#include "cpu/amd/model_10xxx/fidvid.c"
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdfam10/early_ht.c"