Kconfig!

Works on Kontron, qemu, and serengeti. 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

tested on abuild only. 

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

8 files changed, 702 insertions, 0 deletions

diff --git a/src/mainboard/supermicro/Kconfig b/src/mainboard/supermicro/Kconfig
new file mode 100644
index 0000000000..792d600548
--- /dev/null
+++ b/src/mainboard/supermicro/Kconfig
@@ -0,0 +1 @@
+#
diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb
new file mode 100644
index 0000000000..90491e45ed
--- /dev/null
+++ b/src/mainboard/supermicro/h8dme/devicetree.cb
@@ -0,0 +1,143 @@
+chip northbridge/amd/amdk8/root_complex
+        device apic_cluster 0 on
+                chip cpu/amd/socket_F
+                        device apic 0 on end
+                end
+        end
+	device pci_domain 0 on
+		chip northbridge/amd/amdk8 #mc0
+			device pci 18.0 on end
+			device pci 18.0 on end
+			device pci 18.0 on 
+				#  devices on link 0, link 0 == LDT 0 
+			        chip southbridge/nvidia/mcp55 
+					device pci 0.0 on end   # HT
+                			device pci 1.0 on # LPC
+						chip superio/winbond/w83627hf
+							device pnp 2e.0 off #  Floppy
+                	                 			io 0x60 = 0x3f0
+                	                			irq 0x70 = 6
+                	                			drq 0x74 = 2
+							end
+                	        			device pnp 2e.1 off #  Parallel Port
+                	                 			io 0x60 = 0x378
+                	                			irq 0x70 = 7
+							end
+                	        			device pnp 2e.2 on #  Com1
+                	                 			io 0x60 = 0x3f8
+                	                			irq 0x70 = 4
+							end
+                	        			device pnp 2e.3 off #  Com2
+                	                 			io 0x60 = 0x2f8
+                	                			irq 0x70 = 3
+							end
+                	        			device pnp 2e.5 on #  Keyboard
+                	                 			io 0x60 = 0x60
+                	                 			io 0x62 = 0x64
+                	                			irq 0x70 = 1
+								irq 0x72 = 12
+							end
+                	        			device pnp 2e.6 off  # SFI 
+                	                 			io 0x62 = 0x100
+							end
+                	        			device pnp 2e.7 off #  GPIO_GAME_MIDI
+								io 0x60 = 0x220
+								io 0x62 = 0x300
+								irq 0x70 = 9
+							end						
+                	        			device pnp 2e.8 off end #  WDTO_PLED
+                	        			device pnp 2e.9 off end #  GPIO_SUSLED
+                	        			device pnp 2e.a off end #  ACPI
+                	        			device pnp 2e.b on #  HW Monitor
+ 					 			io 0x60 = 0x290
+								irq 0x70 = 5
+                					end
+						end
+					end
+			                device pci 1.1 on # SM 0
+						chip drivers/i2c/i2cmux2
+							device i2c 48 off end
+							device i2c 49 off end
+						end
+					end # SM
+                                        device pci 1.1 on # SM 1
+#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
+#                                                chip drivers/generic/generic #PCIXA Slot1
+#                                                        device i2c 50 on end
+#                                                end
+#                                                chip drivers/generic/generic #PCIXB Slot1
+#                                                        device i2c 51 on end
+#                                                end     
+#                                                chip drivers/generic/generic #PCIXB Slot2
+#                                                        device i2c 52 on end
+#                                                end             
+#                                                chip drivers/generic/generic #PCI Slot1
+#                                                        device i2c 53 on end
+#                                                end              
+#                                                chip drivers/generic/generic #Master MCP55 PCI-E
+#                                                        device i2c 54 on end
+#                                                end     
+#                                                chip drivers/generic/generic #Slave MCP55 PCI-E
+#                                                        device i2c 55 on end
+#                                                end             
+                                                chip drivers/generic/generic #MAC EEPROM
+                                                        device i2c 51 on end
+                                                end
+
+                                        end # SM 
+	                		device pci 2.0 on end # USB 1.1
+        	        		device pci 2.1 on end # USB 2
+                			device pci 4.0 on end # IDE
+	                		device pci 5.0 on end # SATA 0
+	                		device pci 5.1 on end # SATA 1
+	                		device pci 5.2 on end # SATA 2
+                			device pci 6.0 on  # PCI
+                                                chip drivers/pci/onboard
+                                                        device pci 6.0 on end
+							register "rom_address" = "0xfff00000" #for 1M
+#                                                        register "rom_address" = "0xfff80000" #for 512K
+                                                end
+					end
+        	        		device pci 6.1 on end # AZA
+	                		device pci 8.0 on end # NIC
+	                		device pci 9.0 on end # NIC
+        	       			device pci a.0 on  # PCI E 5
+						device pci 0.0 on #nec pci-x
+						end
+						device pci 0.1 on #nec pci-x
+							device pci 4.0 on end #scsi
+							device pci 4.1 on end #scsi
+						end
+					end
+        	       			device pci b.0 on end # PCI E 4
+                			device pci c.0 on end # PCI E 3
+                			device pci d.0 on end # PCI E 2
+                			device pci e.0 on end # PCI E 1
+        	       			device pci f.0 on end # PCI E 0
+	                                register "ide0_enable" = "1"
+                	                register "sata0_enable" = "1"
+                        	        register "sata1_enable" = "1"
+					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
+					register "mac_eeprom_addr" = "0x51"
+				end
+			end #  device pci 18.0 
+			device pci 18.1 on end
+			device pci 18.2 on end
+			device pci 18.3 on end
+		end # mc0
+		
+	end # PCI domain
+	
+#       chip drivers/generic/debug 
+#               device pnp 0.0 off end # chip name
+#                device pnp 0.1 on end # pci_regs_all
+#                device pnp 0.2 off end # mem
+#                device pnp 0.3 off end # cpuid
+#                device pnp 0.4 on end # smbus_regs_all
+#                device pnp 0.5 off end # dual core msr
+#                device pnp 0.6 off end # cache size
+#                device pnp 0.7 off end # tsc
+#                device pnp 0.8 off  end # io
+#                device pnp 0.9 on end # io
+#       end  
+end #root_complex
diff --git a/src/mainboard/supermicro/h8dmr/devicetree.cb b/src/mainboard/supermicro/h8dmr/devicetree.cb
new file mode 100644
index 0000000000..9f5fd765bf
--- /dev/null
+++ b/src/mainboard/supermicro/h8dmr/devicetree.cb
@@ -0,0 +1,163 @@
+chip northbridge/amd/amdk8/root_complex
+        device apic_cluster 0 on
+                chip cpu/amd/socket_F
+                        device apic 0 on end
+                end
+        end
+	device pci_domain 0 on
+		chip northbridge/amd/amdk8 #mc0
+			device pci 18.0 on end
+			device pci 18.0 on end
+			device pci 18.0 on 
+				#  devices on link 0, link 0 == LDT 0 
+			        chip southbridge/nvidia/mcp55 
+					device pci 0.0 on end   # HT
+                			device pci 1.0 on # LPC
+						chip superio/winbond/w83627hf
+							device pnp 2e.0 off #  Floppy
+                	                 			io 0x60 = 0x3f0
+                	                			irq 0x70 = 6
+                	                			drq 0x74 = 2
+							end
+                	        			device pnp 2e.1 off #  Parallel Port
+                	                 			io 0x60 = 0x378
+                	                			irq 0x70 = 7
+							end
+                	        			device pnp 2e.2 on #  Com1
+                	                 			io 0x60 = 0x3f8
+                	                			irq 0x70 = 4
+							end
+                	        			device pnp 2e.3 off #  Com2
+                	                 			io 0x60 = 0x2f8
+                	                			irq 0x70 = 3
+							end
+                	        			device pnp 2e.5 on #  Keyboard
+                	                 			io 0x60 = 0x60
+                	                 			io 0x62 = 0x64
+                	                			irq 0x70 = 1
+								irq 0x72 = 12
+							end
+                	        			device pnp 2e.6 off  # SFI 
+                	                 			io 0x62 = 0x100
+							end
+                	        			device pnp 2e.7 off #  GPIO_GAME_MIDI
+								io 0x60 = 0x220
+								io 0x62 = 0x300
+								irq 0x70 = 9
+							end						
+                	        			device pnp 2e.8 off end #  WDTO_PLED
+                	        			device pnp 2e.9 off end #  GPIO_SUSLED
+                	        			device pnp 2e.a off end #  ACPI
+                	        			device pnp 2e.b on #  HW Monitor
+ 					 			io 0x60 = 0x290
+								irq 0x70 = 5
+                					end
+						end
+					end
+			                device pci 1.1 on # SM 0
+                                                chip drivers/generic/generic #dimm 0-0-0
+                                                        device i2c 50 on end  
+                                                end              
+                                                chip drivers/generic/generic #dimm 0-0-1
+                                                        device i2c 51 on end
+                                                end     
+                                                chip drivers/generic/generic #dimm 0-1-0
+                                                        device i2c 52 on end
+                                                end             
+                                                chip drivers/generic/generic #dimm 0-1-1
+                                                        device i2c 53 on end
+                                                end              
+                                                chip drivers/generic/generic #dimm 1-0-0
+                                                        device i2c 54 on end
+                                                end     
+                                                chip drivers/generic/generic #dimm 1-0-1
+                                                        device i2c 55 on end
+                                                end     
+                                                chip drivers/generic/generic #dimm 1-1-0
+                                                        device i2c 56 on end
+                                                end     
+                                                chip drivers/generic/generic #dimm 1-1-1
+                                                        device i2c 57 on end
+                                                end 
+					end # SM
+                                        device pci 1.1 on # SM 1
+#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
+#                                                chip drivers/generic/generic #PCIXA Slot1
+#                                                        device i2c 50 on end
+#                                                end
+#                                                chip drivers/generic/generic #PCIXB Slot1
+#                                                        device i2c 51 on end
+#                                                end     
+#                                                chip drivers/generic/generic #PCIXB Slot2
+#                                                        device i2c 52 on end
+#                                                end             
+#                                                chip drivers/generic/generic #PCI Slot1
+#                                                        device i2c 53 on end
+#                                                end              
+#                                                chip drivers/generic/generic #Master MCP55 PCI-E
+#                                                        device i2c 54 on end
+#                                                end     
+#                                                chip drivers/generic/generic #Slave MCP55 PCI-E
+#                                                        device i2c 55 on end
+#                                                end             
+                                                chip drivers/generic/generic #MAC EEPROM
+                                                        device i2c 51 on end
+                                                end 
+
+                                        end # SM 
+	                		device pci 2.0 on end # USB 1.1
+        	        		device pci 2.1 on end # USB 2
+                			device pci 4.0 on end # IDE
+	                		device pci 5.0 on end # SATA 0
+	                		device pci 5.1 on end # SATA 1
+	                		device pci 5.2 on end # SATA 2
+                			device pci 6.0 on  # PCI
+                                                chip drivers/pci/onboard
+                                                        device pci 6.0 on end
+							register "rom_address" = "0xfff00000" #for 1M
+#                                                        register "rom_address" = "0xfff80000" #for 512K
+                                                end
+					end
+        	        		device pci 6.1 on end # AZA
+	                		device pci 8.0 on end # NIC
+	                		device pci 9.0 on end # NIC
+        	       			device pci a.0 on  # PCI E 5
+						device pci 0.0 on #nec pci-x
+						end
+						device pci 0.1 on #nec pci-x
+							device pci 4.0 on end #scsi
+							device pci 4.1 on end #scsi
+						end
+					end
+        	       			device pci b.0 on end # PCI E 4
+                			device pci c.0 on end # PCI E 3
+                			device pci d.0 on end # PCI E 2
+                			device pci e.0 on end # PCI E 1
+        	       			device pci f.0 on end # PCI E 0
+	                                register "ide0_enable" = "1"
+                	                register "sata0_enable" = "1"
+                        	        register "sata1_enable" = "1"
+					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
+					register "mac_eeprom_addr" = "0x51"
+				end
+			end #  device pci 18.0 
+			device pci 18.1 on end
+			device pci 18.2 on end
+			device pci 18.3 on end
+		end # mc0
+		
+	end # PCI domain
+	
+#       chip drivers/generic/debug 
+#               device pnp 0.0 off end # chip name
+#                device pnp 0.1 on end # pci_regs_all
+#                device pnp 0.2 off end # mem
+#                device pnp 0.3 off end # cpuid
+#                device pnp 0.4 on end # smbus_regs_all
+#                device pnp 0.5 off end # dual core msr
+#                device pnp 0.6 off end # cache size
+#                device pnp 0.7 off end # tsc
+#                device pnp 0.8 off  end # io
+#                device pnp 0.9 on end # io
+#       end  
+end #root_complex
diff --git a/src/mainboard/supermicro/x6dai_g/devicetree.cb b/src/mainboard/supermicro/x6dai_g/devicetree.cb
new file mode 100644
index 0000000000..97176b9b78
--- /dev/null
+++ b/src/mainboard/supermicro/x6dai_g/devicetree.cb
@@ -0,0 +1,64 @@
+chip northbridge/intel/e7525 # mch
+	device pci_domain 0 on
+		chip southbridge/intel/esb6300  # esb6300 
+			register "pirq_a_d" = "0x0b0a0a05"
+			register "pirq_e_h" = "0x0a0b0c80"
+		
+			device pci 1c.0 on end
+		
+			device pci 1d.0 on end
+			device pci 1d.1 on end
+			device pci 1d.4 on end
+			device pci 1d.5 on end
+			device pci 1d.7 on end
+		
+			device pci 1e.0 on end
+		
+			device pci 1f.0 on 
+				chip superio/winbond/w83627hf
+					device pnp 2e.0 off end
+					device pnp 2e.1 off end
+					device pnp 2e.2 on
+						 io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.3 on
+						 io 0x60 = 0x2f8
+						irq 0x70 = 3
+					end
+					device pnp 2e.4 off end
+					device pnp 2e.5 off end
+					device pnp 2e.6 off end
+					device pnp 2e.7 off end
+					device pnp 2e.9 off end
+					device pnp 2e.a on  end
+					device pnp 2e.b off end
+					device pnp 2e.f off end
+					device pnp 2e.10 off end
+					device pnp 2e.14 off end
+				end
+			end
+			device pci 1f.1 on end
+			device pci 1f.2 on end
+			device pci 1f.3 on end
+			device pci 1f.5 off end
+			device pci 1f.6 on end
+		end
+		device pci 00.0 on end
+		device pci 00.1 on end 
+		device pci 00.2 on end
+		device pci 02.0 on end
+		device pci 03.0 on end
+		device pci 04.0 on end
+		device pci 08.0 on end
+	end
+	device apic_cluster 0 on
+		chip cpu/intel/socket_mPGA604 # cpu0
+			device apic 0 on end
+		end
+		chip cpu/intel/socket_mPGA604 # cpu1
+			device apic 6 on end
+		end
+	end
+end
+
diff --git a/src/mainboard/supermicro/x6dhe_g/devicetree.cb b/src/mainboard/supermicro/x6dhe_g/devicetree.cb
new file mode 100644
index 0000000000..d5625e4c7c
--- /dev/null
+++ b/src/mainboard/supermicro/x6dhe_g/devicetree.cb
@@ -0,0 +1,86 @@
+chip northbridge/intel/e7520  # MCH
+	chip drivers/generic/debug  # DEBUGGING
+		device pnp 00.0 on end
+		device pnp 00.1 off end
+		device pnp 00.2 off end
+		device pnp 00.3 off end
+	end
+	device pci_domain 0 on
+		chip southbridge/intel/esb6300	# ESB6300
+			register "pirq_a_d" = "0x0b070a05"
+			register "pirq_e_h" = "0x0a808080"
+
+			device pci 1c.0 on 
+				chip drivers/generic/generic 
+					device pci 01.0 on end	# onboard gige1
+					device pci 02.0 on end 	# onboard gige2
+				end
+			end
+
+			# USB ports
+			device pci 1d.0 on end
+			device pci 1d.1 on end
+			device pci 1d.4 on end	# Southbridge Watchdog timer
+			device pci 1d.5 on end	# Southbridge I/O apic1
+			device pci 1d.7 on end
+
+			# VGA / PCI 32-bit
+			device pci 1e.0 on 
+				chip drivers/generic/generic
+					device pci 01.0 on end 
+				end
+			end
+
+
+			device pci 1f.0 on 	# ISA bridge
+				chip superio/winbond/w83627hf
+					device pnp 2e.0 off end
+					device pnp 2e.2 on 
+						 io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.3 on
+						 io 0x60 = 0x2f8
+						irq 0x70 = 3
+					end
+					device pnp 2e.4 off end
+					device pnp 2e.5 off end
+					device pnp 2e.6 off end
+					device pnp 2e.7 off end
+					device pnp 2e.9 off end
+					device pnp 2e.a on end
+					device pnp 2e.b off end
+				end
+			end
+			device pci 1f.1 on end
+			device pci 1f.2 off end
+			device pci 1f.3	on end		# SMBus
+			device pci 1f.5 off end
+			device pci 1f.6 off end
+		end
+
+		device pci 00.0	on end	# Northbridge
+		device pci 00.1	on end  # Northbridge Error reporting
+		device pci 01.0 on end
+		device pci 02.0 on 
+			chip southbridge/intel/pxhd	# PXHD 6700 
+				device pci 00.0 on end   # bridge 
+				device pci 00.1 on end   # I/O apic
+				device pci 00.2 on end   # bridge
+				device pci 00.3 on end   # I/O apic
+			end
+		end
+#	 	device register "intrline" = "0x00070105" 
+		device 	pci 04.0 on end	
+		device 	pci 06.0 on end	
+	end
+
+	device apic_cluster 0 on
+		chip cpu/intel/socket_mPGA604  	# CPU 0
+			device apic 0 on end
+		end
+		chip cpu/intel/socket_mPGA604 	# CPU 1
+			device apic 6 on end
+		end
+	end
+end
diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
new file mode 100644
index 0000000000..4bb720707c
--- /dev/null
+++ b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
@@ -0,0 +1,86 @@
+chip northbridge/intel/e7520  # MCH
+	chip drivers/generic/debug  # DEBUGGING
+		device pnp 00.0 off end
+		device pnp 00.1 off end
+		device pnp 00.2 off end
+		device pnp 00.3 off end
+	end
+	device pci_domain 0 on
+		chip southbridge/intel/i82801er	# ICH5R 
+			register "pirq_a_d" = "0x0b070a05"
+			register "pirq_e_h" = "0x0a808080"
+
+			device pci 1c.0 on 
+				chip drivers/generic/generic 
+					device pci 01.0 on end	# onboard gige1
+					device pci 02.0 on end 	# onboard gige2
+				end
+			end
+
+			# USB ports
+			device pci 1d.0 on end
+			device pci 1d.1 on end
+			device pci 1d.4 on end	# Southbridge Watchdog timer
+			device pci 1d.5 on end	# Southbridge I/O apic1
+			device pci 1d.7 on end
+
+			# VGA / PCI 32-bit
+			device pci 1e.0 on 
+				chip drivers/generic/generic
+					device pci 01.0 on end 
+				end
+			end
+
+
+			device pci 1f.0 on 	# ISA bridge
+				chip superio/nsc/pc87427
+					device pnp 2e.0 off end
+					device pnp 2e.2 on 
+						 io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.3 on
+						 io 0x60 = 0x2f8
+						irq 0x70 = 3
+					end
+					device pnp 2e.4 off end
+					device pnp 2e.5 off end
+					device pnp 2e.6 off end
+					device pnp 2e.7 off end
+					device pnp 2e.9 off end
+					device pnp 2e.a on end
+					device pnp 2e.b off end
+				end
+			end
+			device pci 1f.1 on end
+			device pci 1f.2 on end
+			device pci 1f.3	on end		# SMBus
+			device pci 1f.5 off end
+			device pci 1f.6 off end
+		end
+
+		device pci 00.0	on end	# Northbridge
+		device pci 00.1	on end  # Northbridge Error reporting
+		device pci 01.0 on end
+		device pci 02.0 on 
+			chip southbridge/intel/pxhd	# PXHD 6700 
+				device pci 00.0 on end   # bridge 
+				device pci 00.1 on end   # I/O apic
+				device pci 00.2 on end   # bridge
+				device pci 00.3 on end   # I/O apic
+			end
+		end
+#	 	device register "intrline" = "0x00070105" 
+		device 	pci 04.0 on end	
+		device 	pci 06.0 on end	
+	end
+
+	device apic_cluster 0 on
+		chip cpu/intel/socket_mPGA604  	# CPU 0
+			device apic 0 on end
+		end
+		chip cpu/intel/socket_mPGA604 	# CPU 1
+			device apic 6 on end
+		end
+	end
+end
diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
new file mode 100644
index 0000000000..8a82ed7c40
--- /dev/null
+++ b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
@@ -0,0 +1,84 @@
+chip northbridge/intel/e7520 # mch
+	device pci_domain 0 on 
+		chip southbridge/intel/i82801er # i82801er
+			# USB ports
+			device pci 1d.0 on end
+			device pci 1d.1 on end
+			device pci 1d.2 on end 
+			device pci 1d.3 on end
+			device pci 1d.7 on end
+		
+			# -> VGA
+			device pci 1e.0 on end
+		
+			# -> IDE
+			device pci 1f.0 on 
+				chip superio/winbond/w83627hf
+					device pnp 2e.0 off end
+					device pnp 2e.2 on 
+						 io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.3 on
+						 io 0x60 = 0x2f8
+						irq 0x70 = 3
+					end
+					device pnp 2e.4 off end
+					device pnp 2e.5 off end
+					device pnp 2e.6 off end
+					device pnp 2e.7 off end
+					device pnp 2e.9 off end
+					device pnp 2e.a on  end
+					device pnp 2e.b off end
+				end
+			end
+			device pci 1f.1 on end
+			device pci 1f.2 on end
+			device pci 1f.3 on end
+
+			register "pirq_a_d" = "0x0b070a05"
+			register "pirq_e_h" = "0x0a808080"
+		end
+		device pci 00.0 on end 
+		device pci 00.1  on end
+		device pci 01.0 on end 
+		device pci 02.0 on end 
+		device pci 03.0 on 
+			chip southbridge/intel/pxhd # pxhd1
+				# Bus bridges and ioapics usually bus 2
+				device pci 0.0 on end
+				device pci 0.1 on end
+				device pci 0.2 on 
+				# On board gig e1000
+					chip drivers/generic/generic 
+        		        	        device pci 02.0 on end
+        		        	        device pci 02.1 on end
+        		        	end
+				end
+				device pci 0.3 on end
+			end
+		end
+		device pci 04.0 on 
+			chip southbridge/intel/pxhd # pxhd2
+				# Bus bridges and ioapics usually bus 5
+				device pci 0.0 on end
+				# Slot 6  is usually 6:2.0
+				device pci 0.1 on end
+				device pci 0.2 on end
+				# Slot 7 is usually 7:2.0
+				device pci 0.3 on end
+			end
+		end
+		device pci 06.0 on end
+	end
+	device apic_cluster 0 on
+		chip cpu/intel/socket_mPGA604 # cpu 0
+			device apic 0 on end
+		end
+		chip cpu/intel/socket_mPGA604 # cpu 1
+			device apic 6 on end
+		end
+	end
+	register "intrline" = "0x00070105"
+end
+
diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
new file mode 100644
index 0000000000..ab56509fd9
--- /dev/null
+++ b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
@@ -0,0 +1,75 @@
+chip northbridge/intel/e7520 # mch
+	device pci_domain 0 on 
+		chip southbridge/intel/i82801er # i82801er
+			# USB ports
+			device pci 1d.0 on end
+			device pci 1d.1 on end
+			device pci 1d.2 on end 
+			device pci 1d.3 on end
+			device pci 1d.7 on end
+		
+			# -> Bridge
+			device pci 1e.0 on end
+		
+			# -> ISA
+			device pci 1f.0 on 
+				chip superio/winbond/w83627hf
+					device pnp 2e.0 off end
+					device pnp 2e.2 on 
+						 io 0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 2e.3 on
+						 io 0x60 = 0x2f8
+						irq 0x70 = 3
+					end
+					device pnp 2e.4 off end
+					device pnp 2e.5 off end
+					device pnp 2e.6 off end
+					device pnp 2e.7 off end
+					device pnp 2e.9 off end
+					device pnp 2e.a on  end
+					device pnp 2e.b off end
+				end
+			end
+			# -> IDE
+			device pci 1f.1 on end
+			# -> SATA 
+			device pci 1f.2 on end
+			device pci 1f.3 on end
+
+			register "pirq_a_d" = "0x0b070a05"
+			register "pirq_e_h" = "0x0a808080"
+		end
+		device pci 00.0 on end 
+		device pci 00.1 on end
+		device pci 01.0 on end 
+		device pci 02.0 on 
+			chip southbridge/intel/pxhd # pxhd1
+				# Bus bridges and ioapics usually bus 1
+				device pci 0.0 on 
+				# On board gig e1000
+					chip drivers/generic/generic 
+        		        	        device pci 03.0 on end
+        		        	        device pci 03.1 on end
+        		        	end
+				end
+				device pci 0.1 on end
+				device pci 0.2 on end
+				device pci 0.3 on end
+			end
+		end
+		device pci 04.0 on end
+		device pci 06.0 on end
+	end
+	device apic_cluster 0 on
+		chip cpu/intel/socket_mPGA604 # cpu 0
+			device apic 0 on end
+		end
+		chip cpu/intel/socket_mPGA604 # cpu 1
+			device apic 6 on end
+		end
+	end
+	register "intrline" = "0x00070105"
+end
+