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| author | Felix Singer <felixsinger@posteo.net> | 2020-07-29 21:44:36 +0200 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-08-08 12:00:23 +0000 |
| commit | 52919523c14396a8a5dffa34afe40b24b7d68dfc (patch) | |
| tree | 7a20492ce7ac016462b6bf4923741fdb9a4b38a0 /src/mainboard/supermicro | |
| parent | 0da148e326f140ebdb9ef26e864ef453bc36bdfa (diff) | |
| download | coreboot-52919523c14396a8a5dffa34afe40b24b7d68dfc.tar.xz | |
soc/intel/skylake: Enable SDXC depending on devicetree configuration
Currently, SDXC gets enabled by the option ScsSdCardEnabled,
but this duplicates the devicetree on/off options. Therefore, depend on
the devicetree for the enablement of the SDXC controller.
All corresponding mainboards were checked if the devicetree
configuration matches the ScsSdCardEnabled setting, and missing
entries were added.
Change-Id: I298b7d0b0fe2a7346dbadcea4be22dc67fce4de8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/mainboard/supermicro')
| -rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 435015b93f..bbc52db5e7 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -8,7 +8,6 @@ chip soc/intel/skylake # FSP Configuration register "ScsEmmcHs400Enabled" = "0" - register "ScsSdCardEnabled" = "0" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Disabled" @@ -140,6 +139,7 @@ chip soc/intel/skylake device pci 1e.0 off end # UART #0 device pci 1e.1 off end # UART #1 device pci 1e.2 off end # SPI #0 + device pci 1e.6 off end # SDXC device pci 1f.0 on # LPC Interface chip superio/common device pnp 2e.0 on end |