diff options
| author | Edwin Beasant <edwin_beasant@virtensys.com> | 2010-07-06 21:05:04 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-07-06 21:05:04 +0000 |
| commit | eb50c7d922e91f0247b3705eccb2d2eec638c277 (patch) | |
| tree | 2def570d089b2f6deb2beac165e18756a578e308 /src/mainboard/supermicro | |
| parent | 8376831eafc1be1175529fd21e0d2fe40339d4eb (diff) | |
| download | coreboot-eb50c7d922e91f0247b3705eccb2d2eec638c277.tar.xz | |
Re-integrate "USE_OPTION_TABLE" code.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro')
20 files changed, 18 insertions, 20 deletions
diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig index 5852f2714e..76684b2f5e 100644 --- a/src/mainboard/supermicro/h8dme/Kconfig +++ b/src/mainboard/supermicro/h8dme/Kconfig @@ -6,6 +6,7 @@ config BOARD_SUPERMICRO_H8DME select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_NVIDIA_MCP55 select SUPERIO_WINBOND_W83627HF + select HAVE_OPTION_TABLE select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE diff --git a/src/mainboard/supermicro/h8dme/ap_romstage.c b/src/mainboard/supermicro/h8dme/ap_romstage.c index 3454cae313..8643bed96f 100644 --- a/src/mainboard/supermicro/h8dme/ap_romstage.c +++ b/src/mainboard/supermicro/h8dme/ap_romstage.c @@ -39,8 +39,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include "pc80/serial.c" #include "console/console.c" diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index adfe7e353e..b55ebc275c 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -43,8 +43,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig index ae74b7af47..a0a06655c8 100644 --- a/src/mainboard/supermicro/h8dmr/Kconfig +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -6,6 +6,7 @@ config BOARD_SUPERMICRO_H8DMR select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_NVIDIA_MCP55 select SUPERIO_WINBOND_W83627HF + select HAVE_OPTION_TABLE select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE diff --git a/src/mainboard/supermicro/h8dmr/ap_romstage.c b/src/mainboard/supermicro/h8dmr/ap_romstage.c index 3454cae313..8643bed96f 100644 --- a/src/mainboard/supermicro/h8dmr/ap_romstage.c +++ b/src/mainboard/supermicro/h8dmr/ap_romstage.c @@ -39,8 +39,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include "pc80/serial.c" #include "console/console.c" diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index b62b9877ae..ca4c8eec74 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -46,8 +46,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" diff --git a/src/mainboard/supermicro/h8dmr_fam10/Kconfig b/src/mainboard/supermicro/h8dmr_fam10/Kconfig index 1c7facc75b..a3670737a6 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Kconfig +++ b/src/mainboard/supermicro/h8dmr_fam10/Kconfig @@ -6,6 +6,7 @@ config BOARD_SUPERMICRO_H8DMR_FAM10 select SOUTHBRIDGE_NVIDIA_MCP55 select SUPERIO_WINBOND_W83627HF select HAVE_BUS_CONFIG + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select USE_PRINTK_IN_CAR diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 35b46485f4..f14ae5f1ad 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -41,7 +41,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> -#include "option_table.h" #include <console/console.h> #include "lib/ramtest.c" diff --git a/src/mainboard/supermicro/h8qme_fam10/Kconfig b/src/mainboard/supermicro/h8qme_fam10/Kconfig index 5ae140e640..9259b0b6f2 100644 --- a/src/mainboard/supermicro/h8qme_fam10/Kconfig +++ b/src/mainboard/supermicro/h8qme_fam10/Kconfig @@ -7,6 +7,7 @@ config BOARD_SUPERMICRO_H8QME_FAM10 select SOUTHBRIDGE_NVIDIA_MCP55 select SUPERIO_WINBOND_W83627HF select HAVE_BUS_CONFIG + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select USE_PRINTK_IN_CAR diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index f9c03767d6..b400279653 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -41,7 +41,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> -#include "option_table.h" #include <console/console.h> #include "lib/ramtest.c" diff --git a/src/mainboard/supermicro/x6dai_g/Kconfig b/src/mainboard/supermicro/x6dai_g/Kconfig index a681b00766..66cc17df12 100644 --- a/src/mainboard/supermicro/x6dai_g/Kconfig +++ b/src/mainboard/supermicro/x6dai_g/Kconfig @@ -8,6 +8,7 @@ config BOARD_SUPERMICRO_X6DAI_G select ROMCC select HAVE_HARD_RESET select BOARD_HAS_HARD_RESET + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c index af54f80c61..bfbb3bcb7f 100644 --- a/src/mainboard/supermicro/x6dai_g/romstage.c +++ b/src/mainboard/supermicro/x6dai_g/romstage.c @@ -5,8 +5,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" diff --git a/src/mainboard/supermicro/x6dhe_g/Kconfig b/src/mainboard/supermicro/x6dhe_g/Kconfig index cc55edb6d8..e437283afc 100644 --- a/src/mainboard/supermicro/x6dhe_g/Kconfig +++ b/src/mainboard/supermicro/x6dhe_g/Kconfig @@ -9,6 +9,7 @@ config BOARD_SUPERMICRO_X6DHE_G select ROMCC select HAVE_HARD_RESET select BOARD_HAS_HARD_RESET + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c index 4f219ad10b..8151518eee 100644 --- a/src/mainboard/supermicro/x6dhe_g/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g/romstage.c @@ -5,8 +5,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig index 4f0841a402..b2ff1d10fc 100644 --- a/src/mainboard/supermicro/x6dhe_g2/Kconfig +++ b/src/mainboard/supermicro/x6dhe_g2/Kconfig @@ -9,6 +9,7 @@ config BOARD_SUPERMICRO_X6DHE_G2 select ROMCC select HAVE_HARD_RESET select BOARD_HAS_HARD_RESET + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select BOARD_ROMSIZE_KB_1024 diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c index 1e0cddf727..7f20e0a697 100644 --- a/src/mainboard/supermicro/x6dhe_g2/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c @@ -5,8 +5,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig index 9366fe36f4..b650a8dede 100644 --- a/src/mainboard/supermicro/x6dhr_ig/Kconfig +++ b/src/mainboard/supermicro/x6dhr_ig/Kconfig @@ -9,6 +9,7 @@ config BOARD_SUPERMICRO_X6DHR_IG select ROMCC select HAVE_HARD_RESET select BOARD_HAS_HARD_RESET + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select USE_WATCHDOG_ON_BOOT diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c index b973dd9219..1269eb97c2 100644 --- a/src/mainboard/supermicro/x6dhr_ig/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c @@ -5,8 +5,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" diff --git a/src/mainboard/supermicro/x6dhr_ig2/Kconfig b/src/mainboard/supermicro/x6dhr_ig2/Kconfig index ac3070fd40..c1a335b3b4 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/Kconfig +++ b/src/mainboard/supermicro/x6dhr_ig2/Kconfig @@ -9,6 +9,7 @@ config BOARD_SUPERMICRO_X6DHR_IG2 select ROMCC select HAVE_HARD_RESET select BOARD_HAS_HARD_RESET + select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE select USE_WATCHDOG_ON_BOOT diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c index 97be98677d..245c03ed8c 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c @@ -5,8 +5,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" +#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" |