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author | Arthur Heymans <arthur@aheymans.xyz> | 2016-05-19 16:02:38 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2016-10-11 23:34:18 +0200 |
commit | e1f0ac4baa1bbe561276bee8ebc20fe86b0f8cc2 (patch) | |
tree | 0529f2a7fcc717de4ce1707bea9626c9f32cd66e /src/mainboard/supermicro | |
parent | 49a7c37de95531eb2f8037542806ec56240388be (diff) | |
download | coreboot-e1f0ac4baa1bbe561276bee8ebc20fe86b0f8cc2.tar.xz |
lenovo/x60: CST table: use MWAIT requests instead of P_LVLx I/O reads
Requesting low power acpi cpu c-states has two software interfaces:
Using P_LVLx I/O reads or using equivalent MWAIT requests.
This change makes it more consistent with newer targets that use MWAIT
requests.
There also exists extended intel acpi c-states which can be enabled
in two ways:
- using a substate hint to the mwait request (defined in bios);
- setting a model specific register (msr)
Currently this is done by setting the right msr bits but with this
change one can experiment by adding substate hints.
Change-Id: I9eeb5b008e2ddc2193725667f2c13582a4877e3c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/14801
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/supermicro')
0 files changed, 0 insertions, 0 deletions