mb/supermicro: Get rid of whitespace before tab

Change-Id: Id2622e473959dcf105bfeeaebddd582593a3c274
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26637
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

3 files changed, 48 insertions, 48 deletions

diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 723a665e07..f5222ed0a4 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -294,8 +294,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_code(0x3D);
 
-// 	printk(BIOS_DEBUG, "enable_smbus()\n");
-// 	enable_smbus(); /* enable in sio_setup */
+//	printk(BIOS_DEBUG, "enable_smbus()\n");
+//	enable_smbus(); /* enable in sio_setup */
 
 	post_code(0x40);
 
diff --git a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb
index 82229da9ba..2799a26751 100644
--- a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb
+++ b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb
@@ -16,7 +16,7 @@ chip northbridge/amd/amdfam10/root_complex
 			##device pci 18.0 on end
 			device pci 18.0 on #  northbridge
 				chip southbridge/amd/sr5650
-					device pci 0.0 on end # HT  	0x9600
+					device pci 0.0 on end # HT	0x9600
 					device pci 0.1 on end # CLKCONFIG
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
 					device pci 3.0 off end # PCIE P2P bridge	0x960b
@@ -44,49 +44,49 @@ chip northbridge/amd/amdfam10/root_complex
 					device pci 13.0 on end # USB
 					device pci 13.1 on end # USB
 					device pci 13.2 on end # USB
-	 				device pci 14.0 on end # SM
+					device pci 14.0 on end # SM
 					device pci 14.1 on end # IDE    0x439c
 					device pci 14.2 off end # HDA    0x4383, h8scm doesnt have codec.
 					device pci 14.3 on # LPC	0x439d
 						chip superio/winbond/w83627hf
 							device pnp 2e.0 off #  Floppy
-                	                 			io 0x60 = 0x3f0
-                	                			irq 0x70 = 6
-                	                			drq 0x74 = 2
+								io 0x60 = 0x3f0
+								irq 0x70 = 6
+								drq 0x74 = 2
 							end
-                	        			device pnp 2e.1 off #  Parallel Port
-                	                 			io 0x60 = 0x378
-                	                			irq 0x70 = 7
+							device pnp 2e.1 off #  Parallel Port
+								io 0x60 = 0x378
+								irq 0x70 = 7
 							end
-                	        			device pnp 2e.2 off #  Com1
-                	                 			io 0x60 = 0x3f8
-                	                			irq 0x70 = 4
+							device pnp 2e.2 off #  Com1
+								io 0x60 = 0x3f8
+								irq 0x70 = 4
 							end
-                	        			device pnp 2e.3 off #  Com2
-                	                 			io 0x60 = 0x2f8
-                	                			irq 0x70 = 3
+							device pnp 2e.3 off #  Com2
+								io 0x60 = 0x2f8
+								irq 0x70 = 3
 							end
-                	        			device pnp 2e.5 on #  Keyboard
-                	                 			io 0x60 = 0x60
-                	                 			io 0x62 = 0x64
-                	                			irq 0x70 = 1
+							device pnp 2e.5 on #  Keyboard
+								io 0x60 = 0x60
+								io 0x62 = 0x64
+								irq 0x70 = 1
 								irq 0x72 = 12
 							end
-                	        			device pnp 2e.6 off  # SFI
-                	                 			io 0x62 = 0x100
+							device pnp 2e.6 off  # SFI
+								io 0x62 = 0x100
 							end
-                	        			device pnp 2e.7 off #  GPIO_GAME_MIDI
+							device pnp 2e.7 off #  GPIO_GAME_MIDI
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
 							end
-                	        			device pnp 2e.8 off end #  WDTO_PLED
-                	        			device pnp 2e.9 off end #  GPIO_SUSLED
-                	        			device pnp 2e.a off end #  ACPI
-                	        			device pnp 2e.b on #  HW Monitor
- 					 			io 0x60 = 0x290
+							device pnp 2e.8 off end #  WDTO_PLED
+							device pnp 2e.9 off end #  GPIO_SUSLED
+							device pnp 2e.a off end #  ACPI
+							device pnp 2e.b on #  HW Monitor
+								io 0x60 = 0x290
 								irq 0x70 = 5
-                					end
+							end
 						end	#superio/winbond/w83627hf
 					end		#LPC
 					device pci 14.4 on end # PCI 0x4384
diff --git a/src/mainboard/supermicro/h8scm_fam10/dsdt.asl b/src/mainboard/supermicro/h8scm_fam10/dsdt.asl
index e48d1c3d16..bde460c49b 100644
--- a/src/mainboard/supermicro/h8scm_fam10/dsdt.asl
+++ b/src/mainboard/supermicro/h8scm_fam10/dsdt.asl
@@ -257,9 +257,9 @@ DefinitionBlock (
 		PWMK, 1,
 		PWNS, 1,
 
-		/* 	Offset(0x61), */	/*  Options_1 */
-		/* 		,7,  */
-		/* 		R617,1, */
+		/*	Offset(0x61), */	/*  Options_1 */
+		/*		,7,  */
+		/*		R617,1, */
 
 		Offset(0x65),	/* UsbPMControl */
 		, 4,
@@ -855,7 +855,7 @@ DefinitionBlock (
 
 		/* On older chips, clear PciExpWakeDisEn */
 		/*if (LLessEqual(\_SB.SBRI, 0x13)) {
-		*    	Store(0,\_SB.PWDE)
+		*	Store(0,\_SB.PWDE)
 		*}
 		*/
 
@@ -871,13 +871,13 @@ DefinitionBlock (
 	*  used, so it could be removed.
 	*
 	*
-	*  	\_GTS OEM Going To Sleep method
+	*	\_GTS OEM Going To Sleep method
 	*
-	*  	Entry:
-	*  		Arg0=The value of the sleeping state S1=1, S2=2
+	*	Entry:
+	*		Arg0=The value of the sleeping state S1=1, S2=2
 	*
-	*  	Exit:
-	*  		-none-
+	*	Exit:
+	*		-none-
 	*
 	*  Method(\_GTS, 1) {
 	*  DBGO("\\_GTS\n")
@@ -1044,7 +1044,7 @@ DefinitionBlock (
 
 		/*  PCIe HotPlug event  */
 		/* Method(_L0F) {
-		* 	DBGO("\\_GPE\\_L0F\n")
+		*	DBGO("\\_GPE\\_L0F\n")
 		* }
 		*/
 
@@ -1067,19 +1067,19 @@ DefinitionBlock (
 
 		/*  GPM0 SCI event - Moved to USB.asl */
 		/* Method(_L13) {
-		* 	DBGO("\\_GPE\\_L13\n")
+		*	DBGO("\\_GPE\\_L13\n")
 		* }
 		*/
 
 		/*  GPM1 SCI event - Moved to USB.asl */
 		/* Method(_L14) {
-		* 	DBGO("\\_GPE\\_L14\n")
+		*	DBGO("\\_GPE\\_L14\n")
 		* }
 		*/
 
 		/*  GPM2 SCI event - Moved to USB.asl */
 		/* Method(_L15) {
-		* 	DBGO("\\_GPE\\_L15\n")
+		*	DBGO("\\_GPE\\_L15\n")
 		* }
 		*/
 
@@ -1091,7 +1091,7 @@ DefinitionBlock (
 
 		/*  GPM8 SCI event - Moved to USB.asl */
 		/* Method(_L17) {
-		* 	DBGO("\\_GPE\\_L17\n")
+		*	DBGO("\\_GPE\\_L17\n")
 		* }
 		*/
 
@@ -1108,7 +1108,7 @@ DefinitionBlock (
 
 		/*  GPM4 SCI event - Moved to USB.asl */
 		/* Method(_L19) {
-		* 	DBGO("\\_GPE\\_L19\n")
+		*	DBGO("\\_GPE\\_L19\n")
 		* }
 		*/
 
@@ -1139,7 +1139,7 @@ DefinitionBlock (
 
 		/*  GPIO2 or GPIO66 SCI event  */
 		/* Method(_L1E) {
-		* 	DBGO("\\_GPE\\_L1E\n")
+		*	DBGO("\\_GPE\\_L1E\n")
 		* }
 		*/
 
@@ -1149,7 +1149,7 @@ DefinitionBlock (
 		* }
 		*/
 
-	} 	/* End Scope GPE */
+	}	/* End Scope GPE */
 
 	#include "acpi/usb.asl"
 
@@ -1557,7 +1557,7 @@ DefinitionBlock (
 
 #if 0
 				Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)
-				Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) 	/* VGA memory space */
+				Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)	/* VGA memory space */
 				Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1)	/* Assume C0000-E0000 empty */
 				Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS)   /* BIOS ROM area */
 
@@ -1690,7 +1690,7 @@ DefinitionBlock (
 
 				/* On older chips, clear PciExpWakeDisEn */
 				/*if (LLessEqual(\SBRI, 0x13)) {
-				*    	Store(0,\PWDE)
+				*	Store(0,\PWDE)
 				* }
 				*/
 			} /* End Method(_SB._INI) */