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authorElyes HAOUAS <ehaouas@noos.fr>2020-03-31 21:42:02 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-04-10 22:30:06 +0000
commitfd8de1860df9487cffb62bb2b657bd6e55b20596 (patch)
treeac3ac7d9210d693fdec7feec5f06bea5df68f0ce /src/mainboard/system76
parenta0722870a818bec8693911d836ba1bb703d9c676 (diff)
downloadcoreboot-fd8de1860df9487cffb62bb2b657bd6e55b20596.tar.xz
src/mb: Remove unneeded spaces before/after tabs
Change-Id: I02979a0632a7b356985f96c3ba239daba178b4e3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39989 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/system76')
-rw-r--r--src/mainboard/system76/lemp9/devicetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb
index 7a6ba6a959..3fa2c170e3 100644
--- a/src/mainboard/system76/lemp9/devicetree.cb
+++ b/src/mainboard/system76/lemp9/devicetree.cb
@@ -74,11 +74,11 @@ chip soc/intel/cannonlake
# USB2
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 1
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C port 2
- register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 3
- register "usb2_ports[3]" = "USB2_PORT_EMPTY" # NC
+ register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 3
+ register "usb2_ports[3]" = "USB2_PORT_EMPTY" # NC
register "usb2_ports[4]" = "USB2_PORT_EMPTY" # NC
register "usb2_ports[5]" = "USB2_PORT_EMPTY" # NC
- register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # Camera
+ register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # Camera
register "usb2_ports[7]" = "USB2_PORT_EMPTY" # NC
register "usb2_ports[8]" = "USB2_PORT_EMPTY" # NC
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
@@ -90,7 +90,7 @@ chip soc/intel/cannonlake
register "usb2_ports[15]" = "USB2_PORT_EMPTY" # NC
# USB3
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 1
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 1
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C port 2
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 3
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # NC