diff options
| author | Martin Roth <martinroth@google.com> | 2017-06-24 21:54:33 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-06 00:20:06 +0000 |
| commit | 43927bae1846e0768cbfad717f4820f408cde82b (patch) | |
| tree | 3752707f9ecc93f8d125682f6dfb89896ff5db15 /src/mainboard/technexion/tim5690 | |
| parent | 356b519049e6d40e15b2e4a85cae654e2e8df8ba (diff) | |
| download | coreboot-43927bae1846e0768cbfad717f4820f408cde82b.tar.xz | |
mainboard/[m-w]: add IS_ENABLED() around Kconfig symbol references
Change-Id: Ifba3257b0328d0b6ad1bee9bf885683998df5851
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/technexion/tim5690')
| -rw-r--r-- | src/mainboard/technexion/tim5690/mainboard.c | 6 | ||||
| -rw-r--r-- | src/mainboard/technexion/tim5690/romstage.c | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/technexion/tim5690/mainboard.c b/src/mainboard/technexion/tim5690/mainboard.c index 8bc1075a8b..edc1170794 100644 --- a/src/mainboard/technexion/tim5690/mainboard.c +++ b/src/mainboard/technexion/tim5690/mainboard.c @@ -184,7 +184,7 @@ static void mb_gpio_init(u16 *iobase) it8712f_exit_conf(); } -#if CONFIG_VGA_ROM_RUN +#if IS_ENABLED(CONFIG_VGA_ROM_RUN) /* The LCD's panel id seletion. */ static void lcd_panel_id(rs690_vbios_regs *vbios_regs, u8 num_id) { @@ -221,7 +221,7 @@ static void lcd_panel_id(rs690_vbios_regs *vbios_regs, u8 num_id) static void mainboard_enable(device_t dev) { u16 gpio_base = IT8712F_SIMPLE_IO_BASE; -#if CONFIG_VGA_ROM_RUN +#if IS_ENABLED(CONFIG_VGA_ROM_RUN) rs690_vbios_regs vbios_regs; u8 port2; #endif @@ -230,7 +230,7 @@ static void mainboard_enable(device_t dev) mb_gpio_init(&gpio_base); -#if CONFIG_VGA_ROM_RUN +#if IS_ENABLED(CONFIG_VGA_ROM_RUN) /* The LCD's panel id seletion by switch. */ port2 = inb(gpio_base+1); lcd_panel_id(&vbios_regs, ((~port2) & 0xf)); diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index 3b4b4fd656..744ea67921 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -95,7 +95,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) setup_coherent_ht_domain(); -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) /* It is said that we should start core1 after all core0 launched */ wait_all_core0_started(); start_other_cores(); |