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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-19 12:52:43 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-28 17:17:40 +0200 |
| commit | 3eff00ec76f91f5dc9ddf39e2e6073f6053c94a1 (patch) | |
| tree | 02d2f86e299d53c68cf1c774e6f176d8831ee195 /src/mainboard/technexion/tim8690 | |
| parent | 00f360e3f1411925e56676bc4b2ec1b961dcde25 (diff) | |
| download | coreboot-3eff00ec76f91f5dc9ddf39e2e6073f6053c94a1.tar.xz | |
nb/amd/amdk8: Link reset_test.c
This needs some extra headers in amdk8/raminit.c that were otherwise
provided by that file.
Change-Id: I80450e5eb32eb502b3d777c56790db90491fc995
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19360
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/technexion/tim8690')
| -rw-r--r-- | src/mainboard/technexion/tim8690/romstage.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index 7f41536277..f04e805c23 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -26,7 +26,6 @@ #include <delay.h> #include <spd.h> #include <cpu/x86/lapic.h> -#include "northbridge/amd/amdk8/reset_test.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> |