summaryrefslogtreecommitdiff
path: root/src/mainboard/technexion
diff options
context:
space:
mode:
authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-05-14 19:15:08 +1000
committerMarc Jones <marc.jones@se-eng.com>2014-05-28 20:08:21 +0200
commit76d8fd6095edadbe12e2091eebfcb71dbcef798b (patch)
tree66846d02d019756a3e1c64af209de2318e2778b0 /src/mainboard/technexion
parent470c37c372b6b6a6961a3b287f609f55c15f6d4c (diff)
downloadcoreboot-76d8fd6095edadbe12e2091eebfcb71dbcef798b.tar.xz
mainboard/*: Convert to generic ITE superio romstage component
Convert mainboard's that use model specific romstage functions of it8712f to the generic framework by following the reasoning of: a7d14a1 ite/common: Introduce common watchdog and 3.3V VSB helpers Change-Id: I1485306a951103c9a4bc0dbe87c416c91f46c36f Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5737 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/technexion')
-rw-r--r--src/mainboard/technexion/tim5690/romstage.c3
-rw-r--r--src/mainboard/technexion/tim8690/romstage.c3
2 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c
index 35351b1266..68373b9676 100644
--- a/src/mainboard/technexion/tim5690/romstage.c
+++ b/src/mainboard/technexion/tim5690/romstage.c
@@ -40,6 +40,7 @@
#include "southbridge/amd/sb600/early_setup.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -89,7 +90,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb600_lpc_init();
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index 7455df2327..0ba0fce969 100644
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -40,6 +40,7 @@
#include "southbridge/amd/sb600/early_setup.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -84,7 +85,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb600_lpc_init();
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- it8712f_kill_watchdog();
+ ite_kill_watchdog(GPIO_DEV);
console_init();