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authorMyles Watson <mylesgw@gmail.com>2009-06-04 20:18:42 +0000
committerMyles Watson <mylesgw@gmail.com>2009-06-04 20:18:42 +0000
commit1725703a1d37e44464bd988da0bca060afa82207 (patch)
treecc966f6d646415f45c6952e6ae3cf9b32b9427cd /src/mainboard/technexion
parentd11bd003c6aa075fb1a9874a4eb23902edd96f06 (diff)
downloadcoreboot-1725703a1d37e44464bd988da0bca060afa82207.tar.xz
The point of the patch is to make it easier to understand the raminit
code, specifically the difference between pre_f and f code. The only functional changes are in printk statements. The rest is white space. 1. Remove some #if 0 and #if 1 blocks 2. Remove #if USE_DCACHE_RAM blocks. All K8 boards use CAR. 2. Correct typos (canidate -> candidate) 3. Try to minimize the differences between amdk8_f.h and amdk8_pre_f.h 4. Try to minimize the differences between raminit.c and raminit_f.c 5. Make boards that have rev_f processors include the correct raminit code There is much more that could be done, but it's a start. Abuild tested and boot tested on s2892 and serengeti_cheetah. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/technexion')
-rw-r--r--src/mainboard/technexion/tim8690/cache_as_ram_auto.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
index 503bc85495..7d60c2703c 100644
--- a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
+++ b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
@@ -86,7 +86,7 @@ static inline int spd_read_byte(u32 device, u32 address)
#include "northbridge/amd/amdk8/amdk8.h"
#include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/raminit.c"
+#include "northbridge/amd/amdk8/raminit_f.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
#include "resourcemap.c"